本文選題：LNA + 射頻識別��； 參考：《華南理工大學(xué)》2015年碩士論文

【摘要】：射頻識別技術(shù)是一種非接觸式自動識別無線通信技術(shù),它有防磁、耐高溫、讀寫距離大等優(yōu)勢。廣泛應(yīng)用于門禁系統(tǒng)、身份識別、非接觸式付費卡、車輛防盜系統(tǒng)、物流系統(tǒng)等多個領(lǐng)域中應(yīng)用射頻識別技術(shù)主要有四種類型,其中860~960MHz的超高頻射頻識別系統(tǒng)能重復(fù)讀取多個標(biāo)簽、且數(shù)據(jù)容量大,是未來的發(fā)展趨勢。低噪聲放大器(LNA)是射頻識別讀寫器的第一級,直接影響整個接收機的性能。隨著射頻識別技術(shù)的深入推廣和使用、集成工藝的提高,IC規(guī)模越來越大,人們對射頻識別系統(tǒng)的要求越來越高,進(jìn)而對讀寫器中低噪放的要求也越來越高,在對性能要求越來越高的同時,人們希望系統(tǒng)功耗越來越小,以滿足系統(tǒng)續(xù)航能力強的實際應(yīng)用要求,低噪聲放大器低功耗電路設(shè)計的研究和發(fā)展已成為一個研究焦點。針對超高頻射頻識別讀寫器應(yīng)用,本文研究設(shè)計其射頻前端低噪放電路。針對LNA電路功耗大的問題,本文使MOS管工作在亞閾值區(qū),使其電流小,跨導(dǎo)小,進(jìn)而系統(tǒng)功耗小。同時為了彌補工作在亞閾值區(qū)的MOS管帶來的噪聲性能變差、增益不足等問題,本文采用電流復(fù)用技術(shù)和最優(yōu)噪聲匹配方法,最終實現(xiàn)了在較為優(yōu)良的增益、噪聲性能的前提下,降低其功耗的結(jié)果。本文采用Global Foundry 180nm CMOS工藝對提出的LNA電路進(jìn)行了電路設(shè)計、版圖的設(shè)計與物理驗證。版圖后仿真結(jié)果為,本文設(shè)計的低噪放電路采用1.8V電源電壓,電路功耗為1.8m W,低噪放噪聲系數(shù)為NF=3.6d B,在中心頻率915MHz附近的S參數(shù)為,S11=-24.03d B,S22=-19.22d B,輸入輸出匹配良好。電壓增益S21=15.6d B,則電路具有比較高的增益,S12=-46.65d B,可以看出電路有比較好的隔離度。芯片版圖面積為630 450(不含pad)。
[Abstract]:Radio frequency identification (RFID) technology is a non-contact automatic identification wireless communication technology. It has the advantages of magnetic resistance, high temperature resistance and long reading and writing distance. RFID technology is widely used in many fields, such as access control system, identity identification, non-contact payment card, vehicle anti-theft system, logistics system, etc. There are mainly four types of RFID technology. The UHF RFID system of 860~960MHz can read multiple tags repeatedly, and the data capacity is large, which is the development trend in the future. LNA (low noise Amplifier) is the first stage of RFID reader, which directly affects the performance of the whole receiver. With the further promotion and application of RFID technology, the scale of integrated technology is increasing, and the requirement of RFID system is becoming higher and higher, and the requirement of low noise amplifier in the reader is becoming higher and higher. At the same time, people hope that the power consumption of the system will become smaller and smaller to meet the practical application requirements of the system with strong endurance. The research and development of low power circuit design of low noise amplifier has become a research focus. Aiming at the application of UHF RFID reader, the RF front end low noise amplifier circuit is studied and designed in this paper. In order to solve the problem of high power consumption in LNA circuits, this paper makes the MOS transistor work in the sub-threshold region, which makes the current and transconductance small, and then the power consumption of the system is low. At the same time, in order to make up for the problem of noise performance and gain deficiency caused by MOS transistor working in sub-threshold region, this paper adopts current multiplexing technology and optimal noise matching method, and finally realizes the premise of better gain and noise performance. The result of reducing power consumption. In this paper, Global Foundry 180nm CMOS process is used to design the proposed LNA circuit, layout design and physical verification. The simulation results are as follows: 1.8V power supply voltage, 1.8 MW power consumption and NF=3.6d B are used in the low noise amplifier circuit. The S parameter near the center frequency 915MHz is S11- 24.03dBU S22 ~ (-19.22) dB, and the input and output match is good. If the voltage gain is S21 ~ (15. 6) dB, the circuit has a higher gain (S _ (12) ~ (-46.65) dB), which shows that the circuit has good isolation. Chip layout area of 630,450 (excluding padger.
【學(xué)位授予單位】：華南理工大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號】：TP391.44

【參考文獻(xiàn)】

相關(guān)期刊論文 前3條

1 馮東,石秉學(xué);低噪聲放大器中噪聲的系統(tǒng)研究方法(英文)[J];半導(dǎo)體學(xué)報;2005年03期

2 曹克,楊華中,汪蕙;低電壓低功耗CMOS射頻低噪聲放大器的研究進(jìn)展[J];微電子學(xué);2003年04期

3 肖s，

本文編號：1776372