本文選題：應(yīng)答器 + 讀寫(xiě)器　； 參考：《浙江大學(xué)》2014年博士論文

【摘要】：近年來(lái),我國(guó)鐵路和城市軌道交通取得了迅猛發(fā)展,但是作為其中基礎(chǔ)通信的應(yīng)答器系統(tǒng)設(shè)施長(zhǎng)期以來(lái)嚴(yán)重依賴國(guó)外進(jìn)口。因此,研究具有自主知識(shí)產(chǎn)權(quán)的高可靠性應(yīng)答器系統(tǒng)迫在眉睫。目前國(guó)內(nèi)應(yīng)答器技術(shù)正處于起步階段,本文通過(guò)解剖分析國(guó)外先進(jìn)的應(yīng)答器系統(tǒng),了解與掌握其功能定義、工作原理及系統(tǒng)方案。一方面,出于功耗、可靠性以及技術(shù)保密等原因,國(guó)外應(yīng)答器中的邏輯控制部分是以專用集成電路芯片的形式存在的,這使得試圖通過(guò)純反向工程(Reverse Engineering)的方法實(shí)現(xiàn)應(yīng)答器國(guó)產(chǎn)化變得頗為困難。另一方面,為了保證應(yīng)答器中數(shù)據(jù)的安全性和可維護(hù)性,作為應(yīng)答器數(shù)據(jù)管理設(shè)備的讀寫(xiě)器往往由同一應(yīng)答器廠商配套提供。出于同樣原因,難以通過(guò)解剖國(guó)外產(chǎn)品來(lái)指導(dǎo)國(guó)產(chǎn)讀寫(xiě)器的設(shè)計(jì),因此完全自主的研發(fā)讀寫(xiě)器也成為應(yīng)答器系統(tǒng)國(guó)產(chǎn)化亟待解決的問(wèn)題。 讀寫(xiě)器的核心功能是接收應(yīng)答器發(fā)送的FSK信號(hào)并解調(diào)出報(bào)文或序列號(hào)數(shù)據(jù),用于判斷應(yīng)答器是否正常工作。通常,讀寫(xiě)器的工作環(huán)境復(fù)雜,FSK信號(hào)噪聲大,因此研究高抗干擾低誤碼率FSK解調(diào)算法是確保讀寫(xiě)器能夠準(zhǔn)確可靠的管理應(yīng)答器的前提。 由于應(yīng)答器是列車與地面之間數(shù)據(jù)通信必不可少的安全設(shè)備,而應(yīng)答器邏輯控制專用芯片的可靠性直接影響到整個(gè)應(yīng)答器的可靠性,因此本文將抗干擾的三模冗余(Triple Modular Redundancy, TMR)技術(shù)引入到應(yīng)答器邏輯控制專用芯片的底層設(shè)計(jì)中以提高芯片的可靠性。為了防止因干擾發(fā)生在底層表決器上而導(dǎo)致整個(gè)應(yīng)答器TMR邏輯控制專用芯片工作錯(cuò)誤,一般會(huì)采用傳統(tǒng)的自刷新TMR結(jié)構(gòu)。但是傳統(tǒng)的自刷新TMR結(jié)構(gòu)會(huì)增加芯片內(nèi)表決器的數(shù)量,從而導(dǎo)致芯片功耗增大。由于應(yīng)答器是通過(guò)電磁耦合技術(shù)來(lái)獲取工作能量的,功耗過(guò)大無(wú)法滿足應(yīng)答器系統(tǒng)對(duì)功耗的嚴(yán)格要求,因此必須設(shè)計(jì)出符合低功耗要求的TMR邏輯控制專用芯片。 本文正是基于以上需求來(lái)開(kāi)展相關(guān)設(shè)計(jì)研究工作的。本文的主要貢獻(xiàn)如下： 1、為了使讀寫(xiě)器具有高抗干擾性能,本文提出了一種低誤碼率全數(shù)字類相干FSK解調(diào)算法,并以專用芯片的形式加以實(shí)現(xiàn),在中芯國(guó)際SMIC65nm工藝下完成流片。測(cè)試表明,該FSK解調(diào)算法誤碼率和功耗等性能均符合讀寫(xiě)器系統(tǒng)要求且優(yōu)于現(xiàn)有非相干解調(diào)算法。基于該算法實(shí)現(xiàn)的FSK解調(diào)器的品質(zhì)因數(shù)(Figure of Merit, FOM)與最近幾年國(guó)際高水平期刊和會(huì)議上的論文水平相當(dāng)。相關(guān)研究成果在SCI期刊Microelectronics Journal Vol.45, No.6(2014.6)上發(fā)表。在此基礎(chǔ)上,完成了基于該FSK解調(diào)算法的讀寫(xiě)器整機(jī)方案及其專用芯片的設(shè)計(jì)與測(cè)試,相關(guān)研究成果在SCI期刊Journal of Circuits, Systems and Computers, Vol.22, No.9(2013.10)上發(fā)表。 2、為了解決現(xiàn)有應(yīng)答器TMR邏輯控制專用芯片中頂層表決器受干擾會(huì)造成整個(gè)芯片出錯(cuò)的問(wèn)題,本文提出了一種可替代的雙模表決器(Dual Modular Voter,DMV)方案。采用電路節(jié)點(diǎn)注入單粒子瞬態(tài)翻轉(zhuǎn)(Single Event Transient, SET)的方式,驗(yàn)證了該DMV是一個(gè)完全容錯(cuò)的表決器,不會(huì)因受到SET干擾而出錯(cuò),但代價(jià)是功耗略高于傳統(tǒng)表決器。為了進(jìn)一步降低功耗,本文相繼提出了基于異或門(mén)(XOR)和二選一選擇器(MUX)實(shí)現(xiàn)的表決器電路新形式,該表決器僅由12個(gè)MOS管組成,可作為DMV中的單個(gè)表決器使用。鑒于DMV是一個(gè)完全容錯(cuò)的低功耗表決器,因此該DMV不僅可用作應(yīng)答器TMR邏輯控制專用芯片中的頂層表決器,還可替代所有的底層表決器。在CSMC0.5um工藝不同工藝角下仿真結(jié)果表明,用一個(gè)DMV替代三個(gè)底層傳統(tǒng)表決器后,至少可以節(jié)省61%的表決器功耗。為了便于EDA工具將所設(shè)計(jì)的DMV自動(dòng)插入芯片版圖中,利用商用軟件Siliconsmart完成了DMV的標(biāo)準(zhǔn)單元特征化。在無(wú)錫上華CSMC0.5um標(biāo)準(zhǔn)CMOS工藝下完成了一款基于DMV的自刷新TMR邏輯控制專用芯片,其電流僅為0.486mA(小于0.7mA的指標(biāo)要求)。應(yīng)用了該芯片的應(yīng)答器,在保持其它性能指標(biāo)相當(dāng)?shù)那闆r下,整機(jī)功耗和啟動(dòng)時(shí)間這兩項(xiàng)關(guān)鍵性能指標(biāo)均優(yōu)于西門(mén)子公司的產(chǎn)品。DMV相關(guān)研究成果在SCI期刊IEICE Electronics Express, Vol.11, No.4(2014.2)上發(fā)表。
[Abstract]:In recent years, China's railway and urban rail transit have developed rapidly, but the infrastructure of the transponder system, as a basic communication system, has long been heavily dependent on foreign imports. Therefore, it is imminent to study the high reliability transponder system with independent intellectual property rights. Anatomic analysis of foreign advanced transponder system, understanding and mastering its function definition, working principle and system scheme. On the one hand, the logic control part of foreign transponder is stored in the form of special integrated circuit chip for reasons such as power consumption, reliability and technology secrecy, which makes the attempt to pass the pure reverse Engineering (Reverse Engi). On the other hand, in order to ensure the security and maintainability of the data in the transponder, the reader and writer of the transponder data management device is often provided by the same transponder vendor. For the same reason, it is difficult to pass the dissection of foreign products to guide the design of the domestic reader and writer for the same reason. Therefore, fully autonomous R & D reader is also an urgent problem to be solved in localization of transponder system.
The core function of the reader and writer is to receive the FSK signal sent by the transponder and to solve the message or serial number data. It is used to judge whether the responder is working properly. Usually, the working environment of the reader is complex and the noise of the FSK signal is large. Therefore, the study of the high anti-interference and low error rate FSK demodulation algorithm is to ensure that the reader can be accurately and reliably managed by the reader. The premise.
Because the transponder is a necessary security device for the data communication between the train and the ground, and the reliability of the transponder logic control special chip directly affects the reliability of the whole transponder, this paper introduces the anti jamming three mode redundancy (Triple Modular Redundancy, TMR) technology to the bottom of the transponder logic control special chip. In order to improve the reliability of the chip in the design, in order to prevent the whole transponder TMR logic control special chip from working due to interference on the underlying voter, the traditional self refresh TMR structure is generally adopted. However, the traditional self refresh TMR structure will increase the number of internal chip voter, resulting in the increase of the chip power consumption. The transponder is through electromagnetic coupling technology to obtain the working energy, and the power consumption is too large to meet the strict requirements of the transponder system for power consumption. Therefore, a TMR logic control special chip which meets the requirements of low power consumption is designed.
This article is based on the above needs to carry out relevant design and research work. The main contributions of this paper are as follows:
1, in order to make the reader with high anti-interference performance, this paper presents a low bit error rate all digital coherent FSK demodulation algorithm, which is implemented in the form of a dedicated chip, and completes the flow sheet under the Central International SMIC65nm process. The test shows that the performance of the FSK demodulation algorithm is in accordance with the reader system requirements and is better than the current reader system. There is an incoherent demodulation algorithm. The FSK demodulator's quality factor (Figure of Merit, FOM) based on this algorithm is equal to the level of papers at high international journals and conferences in recent years. The related research results are published on the SCI Journal Microelectronics Journal Vol.45, No.6 (2014.6). On this basis, the demodulation is completed based on the FSK demodulation. The design and test of the whole program and its dedicated chip for the reader and writer of the law are published on the SCI Journal Journal of Circuits, Systems and Computers, Vol.22, and No.9 (2013.10).
2, in order to solve the problem of the whole chip error caused by the interference of the top layer voter in the existing transponder TMR logic control special chip, this paper proposes an alternative Dual Modular Voter (DMV) scheme. The circuit node is injected into the single particle transient flipping (Single Event Transient, SET), and the DMV is validated to verify the DMV. It is a completely fault-tolerant voting device that does not make errors due to SET interference, but costs a little higher than the traditional voting device. In order to further reduce power consumption, a new form of voter circuit based on XOR and two selector (MUX) is proposed. The voter is composed of only 12 MOS tubes, which can be used as a single DMV. In view of the fact that DMV is a fully fault-tolerant low power voting device, the DMV can be used not only as the top layer voter in the transponder TMR logic control special chip, but also in the substitutes of all the underlying voting devices. The simulation results at different process angles of the CSMC0.5um process show that after a DMV is used to replace the three underlying conventional voting devices, At least 61% of the voting power consumption can be saved. In order to facilitate the EDA tool to automatically insert the designed DMV into the chip layout, the standard unit of DMV is characterized by the commercial software Siliconsmart. A self refreshing TMR logic control special chip based on DMV is completed under the CSMC0.5um standard CMOS technology in Wuxi, with a current of only 0.4. 86mA (less than 0.7mA). With the application of the chip's transponder, the two key performance indicators of the whole machine power and startup time are better than the.DMV related research results of SIEMENS's products in the SCI Journal IEICE Electronics Express, Vol.11, No.4 (2014.2).
【學(xué)位授予單位】：浙江大學(xué)
【學(xué)位級(jí)別】：博士
【學(xué)位授予年份】：2014
【分類號(hào)】：U284.7

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