本文選題：CK-CORE + 導(dǎo)航SoC芯片�。� 參考：《西安電子科技大學(xué)》2013年碩士論文

【摘要】：目前衛(wèi)星導(dǎo)航基帶芯片長(zhǎng)期被國(guó)外廠商壟斷,雖然隨著我國(guó)北斗衛(wèi)星導(dǎo)航系統(tǒng)的建設(shè)和試運(yùn)行,極大的促進(jìn)了我國(guó)衛(wèi)星導(dǎo)航基帶芯片的發(fā)展,但是其內(nèi)嵌處理器均為國(guó)外的ARM或DSP等內(nèi)核,國(guó)產(chǎn)嵌入式處理器在此領(lǐng)域內(nèi)還是空白。因此開發(fā)基于國(guó)內(nèi)自主知識(shí)產(chǎn)權(quán)CPU的衛(wèi)星導(dǎo)航基帶處理芯片顯得越發(fā)的迫切和重要。 本文通過研究成熟的基帶捕獲、跟蹤、位置速度時(shí)間(PVT)算法,基于我國(guó)自主知識(shí)產(chǎn)權(quán)的CK-CORE處理器,設(shè)計(jì)實(shí)現(xiàn)了一款可滿足導(dǎo)航定位應(yīng)用的導(dǎo)航SoC芯片。本文首先分析主流的時(shí)域串行、碼相位并行、頻域并行的捕獲算法,設(shè)計(jì)實(shí)現(xiàn)了一種結(jié)合碼相位并行和頻域并行的捕獲算法；隨后采用經(jīng)典的鎖定環(huán)路來實(shí)現(xiàn)碼相位的跟蹤以及載波的跟蹤；通過搭建FPGA驗(yàn)證系統(tǒng),能夠有效的驗(yàn)證該導(dǎo)航SoC功能的正確性；之后通過充分掌握基于CK-CORE軟件的編譯和優(yōu)化等方法來對(duì)該導(dǎo)航SoC的程序進(jìn)行了移植和優(yōu)化；最后基于流片后的導(dǎo)航SoC芯片實(shí)現(xiàn)并驗(yàn)證了一款集成射頻和該導(dǎo)航SoC的OEM板,并對(duì)該OEM應(yīng)用板進(jìn)行了測(cè)試和驗(yàn)證。
[Abstract]:At present, satellite navigation baseband chip has been monopolized by foreign manufacturers for a long time. Although with the construction and trial operation of Beidou satellite navigation system in China, it has greatly promoted the development of satellite navigation baseband chip in China. However, embedded processors are foreign arm or DSP cores, and domestic embedded processors are blank in this field. Therefore, it is more and more urgent and important to develop satellite navigation baseband processing chip based on domestic intellectual property CPU. In this paper, we design and implement a navigation SoC chip based on CK-CORE processor based on our own intellectual property by studying mature base-band acquisition, tracking and position velocity time (PVT) algorithms. Firstly, this paper analyzes the main acquisition algorithms in time domain, code phase parallelism and frequency domain parallelism, and designs and implements a acquisition algorithm combining code phase parallelism and frequency domain parallelism. Then the classical locking loop is used to realize code phase tracking and carrier tracking, and the correctness of the navigation SoC function can be effectively verified by setting up an FPGA verification system. After that, the program of navigation SoC is transplanted and optimized by fully mastering the compilation and optimization of CK-CORE software. Finally, an integrated radio frequency and OEM board of the navigation SoC is implemented and verified based on the navigation SoC chip after streaming chip. The OEM application board is tested and verified.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TN96.1

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本文編號(hào)：2089731