基于相變存儲(chǔ)器的混合主存緩沖區(qū)管理問(wèn)題研究
發(fā)布時(shí)間：2018-10-22 14:05
【摘要】：隨著計(jì)算機(jī)技術(shù)的高速發(fā)展,當(dāng)前網(wǎng)絡(luò)、數(shù)據(jù)中心、高性能計(jì)算等領(lǐng)域的數(shù)據(jù)規(guī)模呈現(xiàn)爆炸性的增長(zhǎng)。由于數(shù)據(jù)應(yīng)用規(guī)模的增大,對(duì)于數(shù)據(jù)存取速度的要求也越來(lái)越高。磁盤作為傳統(tǒng)的數(shù)據(jù)存儲(chǔ)介質(zhì),由于其機(jī)械尋道的特性,I/0速度很難提高,已難以滿足如今大規(guī)模數(shù)據(jù)存取的速度需求。為了解決這一問(wèn)題,使用大容量主存來(lái)存放重要數(shù)據(jù)的思想被提出,并在學(xué)術(shù)界和工業(yè)界受到了重視,這帶來(lái)了未來(lái)對(duì)大容量主存的迫切需求。然而,面對(duì)大容量主存需求的趨勢(shì),傳統(tǒng)的主存存儲(chǔ)介質(zhì)DRAM的缺陷,成為了制約大容量主存系統(tǒng)應(yīng)用的瓶頸。DRAM的存儲(chǔ)密度提升困難,單位存儲(chǔ)成本遠(yuǎn)高于磁盤和固態(tài)硬盤。此外,DRAM的能耗較高,且隨著DRAM容量的提升成比例增長(zhǎng)。因此,使用DRAM構(gòu)建大容量主存系統(tǒng),代價(jià)十分高昂。相變存儲(chǔ)器(Phase Change memory, PCM)是一種使用硫族化合物作為存儲(chǔ)介質(zhì)的新型主存存儲(chǔ)技術(shù),利用材料在不同狀態(tài)下的電阻差異來(lái)保存數(shù)據(jù)。相變存儲(chǔ)器具有以下特點(diǎn)：無(wú)機(jī)械部件,可按位尋址,斷電后數(shù)據(jù)不丟失,無(wú)空閑能耗,存儲(chǔ)密度大,讀寫速度快等。與DRAM相比,相變存儲(chǔ)器在非易失性、存儲(chǔ)密度和能耗方面具有很大的優(yōu)勢(shì),被認(rèn)為是最有希望取代DRAM的下一代主存存儲(chǔ)介質(zhì)。因此,如何在現(xiàn)有計(jì)算機(jī)體系架構(gòu)中使用相變存儲(chǔ)器成為了當(dāng)前學(xué)術(shù)界研究的熱點(diǎn)之一。然而,相變存儲(chǔ)器也同樣存在著不足之處。首先,相變存儲(chǔ)器具有讀寫不對(duì)稱性,寫延遲約為DRAM的7到20倍;其次,相變存儲(chǔ)器存在耐久性問(wèn)題,每個(gè)存儲(chǔ)單元的可擦寫次數(shù)有限。因此,現(xiàn)階段難以直接使用相變存儲(chǔ)器取代DRAM。使用DRAM和相變存儲(chǔ)器作為同級(jí)主存,構(gòu)建相變存儲(chǔ)器DRAM的混合主存系統(tǒng),同時(shí)利用DRAM的寫性能優(yōu)勢(shì)和相變存儲(chǔ)器的存儲(chǔ)容量?jī)?yōu)勢(shì),被認(rèn)為是一種合理的解決方案。由于混合主存架構(gòu)同時(shí)具有兩種性能不同的存儲(chǔ)介質(zhì),傳統(tǒng)的基于DRAM主存的數(shù)據(jù)管理技術(shù)不適用于混合主存架構(gòu)。在這些數(shù)據(jù)管理技術(shù)當(dāng)中,緩沖區(qū)管理算法是一項(xiàng)至關(guān)重要的技術(shù),直接影響了主存系統(tǒng)的性能表現(xiàn)。在傳統(tǒng)的DRAM主存系統(tǒng)中,緩沖區(qū)命中率是最重要的性能指標(biāo),緩沖區(qū)管理算法主要關(guān)注如何提升命中率。然而對(duì)于混合主存系統(tǒng),緩沖區(qū)管理算法不僅需要考慮命中率,還需要考慮如何在兩種不同的存儲(chǔ)介質(zhì)中分配和管理數(shù)據(jù),以降低相變存儲(chǔ)器的寫負(fù)擔(dān),提升混合主存系統(tǒng)的整體性能。本論文針對(duì)以相變存儲(chǔ)器和DRAM作為同級(jí)主存的混合主存架構(gòu)環(huán)境下的緩沖區(qū)管理問(wèn)題展開(kāi)研究。論文圍繞著如何在保證緩沖區(qū)命中率的條件下降低相變存儲(chǔ)器寫次數(shù)這一核心問(wèn)題,深入研究適用于混合主存架構(gòu)的緩沖區(qū)管理算法,在傳統(tǒng)緩沖區(qū)管理算法的基礎(chǔ)上,提出了一系列可有效降低相變存儲(chǔ)器寫次數(shù)、提高混合主存系統(tǒng)整體性能的緩沖區(qū)管理算法。論文首先介紹相變存儲(chǔ)器技術(shù)的研究背景和相關(guān)技術(shù),從在現(xiàn)有計(jì)算機(jī)體系結(jié)構(gòu)引入相變存儲(chǔ)器的方法和基于相變存儲(chǔ)器的數(shù)據(jù)管理技術(shù)這兩個(gè)方面,總結(jié)了當(dāng)前國(guó)內(nèi)外研究現(xiàn)狀,重點(diǎn)分析了現(xiàn)有的基于混合主存的緩沖區(qū)管理算法研究工作,發(fā)現(xiàn)當(dāng)前研究工作中存在的緩沖區(qū)命中率下降和部分訪問(wèn)模式下不能降低相變存儲(chǔ)器寫次數(shù)的問(wèn)題,并指出產(chǎn)生這些問(wèn)題的原因。然后,本文以傳統(tǒng)的LRU緩沖區(qū)管理算法為基礎(chǔ),根據(jù)混合主存環(huán)境的需求,改進(jìn)了LRU算法的頁(yè)面載入機(jī)制,在保證緩沖區(qū)命中率不變的前提下有效地降低了混合主存內(nèi)相變存儲(chǔ)器的寫次數(shù)；隨后,本文提出了一個(gè)相變存儲(chǔ)器內(nèi)頁(yè)面寫熱度判斷機(jī)制和一個(gè)DRAM/相變存儲(chǔ)器間頁(yè)面交換機(jī)制,在不降低命中率的條件下有效地解決了相變存儲(chǔ)器內(nèi)頁(yè)面變?yōu)閷憻犴?yè)的問(wèn)題,將該機(jī)制引入改進(jìn)了頁(yè)面載入的LRU算法,進(jìn)一步提升了算法性能；最后,本文分析了相變存儲(chǔ)器上發(fā)生置換操作對(duì)相變存儲(chǔ)器造成的寫負(fù)擔(dān),提出了一種考慮在DRAM／相變存儲(chǔ)器之間平衡頁(yè)面置換的緩沖區(qū)管理算法。本論文的主要貢獻(xiàn)可歸納為以下幾個(gè)方面：(1)提出了一種“置換時(shí)遷移頁(yè)面”的策略和采用該策略的基于LRU算法的混合主存緩沖區(qū)管理算法MHR-LRU。當(dāng)發(fā)生頁(yè)面置換時(shí),MHR-LRU根據(jù)頁(yè)面請(qǐng)求類型通過(guò)相變存儲(chǔ)器與DRAM之間遷移頁(yè)面方法將被請(qǐng)求頁(yè)載入到合適的存儲(chǔ)介質(zhì)中,在保證命中率不變的同時(shí)減少了相變存儲(chǔ)器由于載入頁(yè)面造成的寫操作次數(shù)和未來(lái)發(fā)生在相變存儲(chǔ)器上的寫操作次數(shù),提升混合主存的整體性能。(2)在MHR-LRU算法的基礎(chǔ)上,針對(duì)相變存儲(chǔ)器內(nèi)的頁(yè)面變?yōu)閷憻犴?yè)的問(wèn)題,提出了一個(gè)采用DRAM/相變存儲(chǔ)器間頁(yè)面交換機(jī)制的改進(jìn)算法MWQ-LRU。MWQ-LRU算法綜合考慮了頁(yè)面的寫頻率和最近寫訪問(wèn)時(shí)間判斷頁(yè)面是否為寫熱頁(yè),并將相變存儲(chǔ)器內(nèi)被判斷為寫熱頁(yè)的頁(yè)面與DRAM中寫熱度低的頁(yè)面進(jìn)行交換。MWQ-LRU算法可以在保證命中率與LRU算法相同的條件下,將寫熱頁(yè)盡可能地保存在DRAM中,進(jìn)一步降低相變存儲(chǔ)器的寫次數(shù)。(3)針對(duì)現(xiàn)有的基于混合主存的緩沖區(qū)管理算法在讀操作密集的負(fù)載下不能有效減少相變存儲(chǔ)器寫負(fù)擔(dān)的問(wèn)題,指出在讀操作密集的負(fù)載下相變存儲(chǔ)器的寫負(fù)擔(dān)主要來(lái)自于相變存儲(chǔ)器上發(fā)生的頁(yè)面置換,而現(xiàn)有工作沒(méi)有關(guān)注頁(yè)面置換對(duì)相變存儲(chǔ)器的影響,并提出了一個(gè)考慮頁(yè)面置換影響的混合主存緩沖區(qū)管理算法D-CLOCK。該算法能夠減少相變存儲(chǔ)器由于頁(yè)面置換操作造成的寫負(fù)擔(dān)并保持命中率,在讀密集負(fù)載下能夠有效降低相變存儲(chǔ)器的寫次數(shù)。
[Abstract]:With the rapid development of computer technology, the data scale in the current network, data center, high-performance computing and so on presents explosive growth. Because of the increase of data application scale, the demand for data access speed is getting higher and higher. Disk as a traditional data storage medium, I/ 0 speed is difficult to improve due to its mechanical homing characteristics, and it is difficult to meet the speed requirement of large-scale data access today. In order to solve this problem, the idea of using large-capacity main memory to store important data is put forward and paid more attention to the academia and industry, which brings about the urgent need for large-capacity main storage in the future. However, in the face of the trend of large capacity storage demand, the defect of traditional main memory storage medium DRAM has become the bottleneck restricting the application of large capacity main memory system. The storage density of DRAM is difficult, and the unit storage cost is much higher than that of magnetic disk and solid-state hard disk. In addition, the energy consumption of the DRAM is high, and the DRAM capacity increases in proportion. Therefore, using DRAM to construct large capacity main memory system, the cost is very high. Phase change memory (PCM) is a new type of main memory storage technology using sulfur compounds as storage medium, and uses the resistance difference of materials in different states to store data. The phase change memory has the following characteristics: no mechanical parts, no data loss after power failure, no idle energy consumption, large storage density, high reading and writing speed and the like. Compared with DRAM, the phase-change memory has great advantages in the aspects of non-volatility, storage density and energy consumption, and is considered to be the next generation main storage storage medium which is most promising to replace DRAM. Therefore, how to use the phase-change memory in the existing computer system architecture has become one of the hot topics in the field of academia. However, the phase change memory also suffers from deficiencies. firstly, the phase-change memory has read-write asymmetry and write delay is about 7-20 times of the DRAM; secondly, the phase-change memory has durability problem, and the erasable number of each memory cell is limited. Therefore, it is difficult to directly use the phase change memory to replace the DRAM at this stage. By using DRAM and phase-change memory as the main memory of the same level, the hybrid main memory system of phase-change memory DRAM is constructed, and simultaneously the write performance advantage of DRAM and the storage capacity advantage of phase-change memory are utilized to be considered as a reasonable solution. Because the hybrid main memory architecture has two different storage media, the traditional DRAM-hosted data management technology does not apply to the hybrid main memory architecture. In these data management technologies, the buffer management algorithm is a key technology, which directly affects the performance of main memory system. In the traditional DRAM main memory system, the buffer hit rate is the most important performance index, and the buffer management algorithm mainly focuses on how to improve the hit rate. However, for the hybrid main memory system, the buffer management algorithm not only needs to take into account the hit rate, but also needs to consider how to allocate and manage data in two different storage media, so as to reduce the write burden of the phase change memory and improve the overall performance of the hybrid main memory system. In this paper, we study the buffer management problem under the mixed main memory architecture with phase change memory and DRAM as the main memory of the same level. Based on the traditional buffer management algorithm, this paper focuses on how to reduce the number of write times of phase change memory under the condition of guaranteeing the hit rate of buffer zone. A series of buffer management algorithms which can effectively reduce the number of write times of the phase change memory and improve the overall performance of the hybrid main memory system are proposed. The paper first introduces the research background and related technology of phase change memory technology, introduces the current research status at home and abroad from two aspects of introducing phase change memory into existing computer architecture and data management technology based on phase change memory. This paper focuses on the research work of the existing buffer management algorithm based on mixed main memory, and finds that the buffer hit ratio and partial access mode existing in the current research work cannot reduce the number of write times of the phase change memory, and points out the causes of these problems. Then, based on the traditional LRU buffer management algorithm, this paper improves the page loading mechanism of LRU algorithm according to the requirement of mixed main storage environment, and effectively reduces the number of write times of phase-change memory in the main memory under the premise of ensuring that the hit ratio of the buffer zone is unchanged, and then, The invention provides a page write heat judgment mechanism in a phase change memory and a page switching mechanism between a DRAM/ phase change memory, which effectively solves the problem that the page in the phase change memory becomes a write hot page without reducing the hit rate, By introducing the mechanism into the LRU algorithm which improves the page loading, the algorithm performance is further improved; and finally, the writing burden caused by the permutation operation on the phase-change memory is analyzed in the paper, A buffer management algorithm considering balancing page replacement between DRAM/ phase-change memories is presented. The main contributions of this thesis can be summarized as follows: (1) a new method is proposed "Move Page During Displacement" and a hybrid host buffer management algorithm MHR-LRU based on the LRU algorithm of the policy. when a page replacement occurs, the MHR-LRU loads the requested page into a suitable storage medium according to the page request type through the migration page method between the phase change memory and the DRAM, the invention reduces the number of write operations caused by the loading page and the number of write operations that occur on the phase change memory in the future while ensuring that the hit rate is unchanged, and improves the overall performance of the mixed main memory. (2) on the basis of the MHR-LRU algorithm, the page in the phase change memory becomes a write hot page, An improved algorithm MWQ-LRU (MWQ-LRU) based on page switching mechanism between DRAM/ phase change memory is presented, which takes into account the page's write frequency and the latest write access time to judge whether the page is a write hot page. and the page which is judged as the write hot page in the phase change memory is exchanged with a page with low writing heat in the DRAM. The MWQ-LRU algorithm can save the write hot page as much as possible in the DRAM under the same conditions as the LRU algorithm, and further reduce the number of write times of the phase change memory. (3) Aiming at the problem that the existing buffer management algorithm based on the mixed main memory cannot effectively reduce the writing burden of the phase change memory under the load of the intensive load, the write burden of the phase change memory under the load of the read operation is mainly derived from the page permutation occurring on the phase change memory, In this paper, the influence of page permutation on phase change memory is not concerned, and a mixed main memory buffer management algorithm D-CLOCK considering page replacement is proposed. The algorithm can reduce the write burden caused by the page displacement operation of the phase change memory and keep the hit ratio, and can effectively reduce the number of writing times of the phase change memory under the read intensive load.
【學(xué)位授予單位】：中國(guó)科學(xué)技術(shù)大學(xué)
【學(xué)位級(jí)別】：博士
【學(xué)位授予年份】：2016
【分類號(hào)】：TP333
[Abstract]:With the rapid development of computer technology, the data scale in the current network, data center, high-performance computing and so on presents explosive growth. Because of the increase of data application scale, the demand for data access speed is getting higher and higher. Disk as a traditional data storage medium, I/ 0 speed is difficult to improve due to its mechanical homing characteristics, and it is difficult to meet the speed requirement of large-scale data access today. In order to solve this problem, the idea of using large-capacity main memory to store important data is put forward and paid more attention to the academia and industry, which brings about the urgent need for large-capacity main storage in the future. However, in the face of the trend of large capacity storage demand, the defect of traditional main memory storage medium DRAM has become the bottleneck restricting the application of large capacity main memory system. The storage density of DRAM is difficult, and the unit storage cost is much higher than that of magnetic disk and solid-state hard disk. In addition, the energy consumption of the DRAM is high, and the DRAM capacity increases in proportion. Therefore, using DRAM to construct large capacity main memory system, the cost is very high. Phase change memory (PCM) is a new type of main memory storage technology using sulfur compounds as storage medium, and uses the resistance difference of materials in different states to store data. The phase change memory has the following characteristics: no mechanical parts, no data loss after power failure, no idle energy consumption, large storage density, high reading and writing speed and the like. Compared with DRAM, the phase-change memory has great advantages in the aspects of non-volatility, storage density and energy consumption, and is considered to be the next generation main storage storage medium which is most promising to replace DRAM. Therefore, how to use the phase-change memory in the existing computer system architecture has become one of the hot topics in the field of academia. However, the phase change memory also suffers from deficiencies. firstly, the phase-change memory has read-write asymmetry and write delay is about 7-20 times of the DRAM; secondly, the phase-change memory has durability problem, and the erasable number of each memory cell is limited. Therefore, it is difficult to directly use the phase change memory to replace the DRAM at this stage. By using DRAM and phase-change memory as the main memory of the same level, the hybrid main memory system of phase-change memory DRAM is constructed, and simultaneously the write performance advantage of DRAM and the storage capacity advantage of phase-change memory are utilized to be considered as a reasonable solution. Because the hybrid main memory architecture has two different storage media, the traditional DRAM-hosted data management technology does not apply to the hybrid main memory architecture. In these data management technologies, the buffer management algorithm is a key technology, which directly affects the performance of main memory system. In the traditional DRAM main memory system, the buffer hit rate is the most important performance index, and the buffer management algorithm mainly focuses on how to improve the hit rate. However, for the hybrid main memory system, the buffer management algorithm not only needs to take into account the hit rate, but also needs to consider how to allocate and manage data in two different storage media, so as to reduce the write burden of the phase change memory and improve the overall performance of the hybrid main memory system. In this paper, we study the buffer management problem under the mixed main memory architecture with phase change memory and DRAM as the main memory of the same level. Based on the traditional buffer management algorithm, this paper focuses on how to reduce the number of write times of phase change memory under the condition of guaranteeing the hit rate of buffer zone. A series of buffer management algorithms which can effectively reduce the number of write times of the phase change memory and improve the overall performance of the hybrid main memory system are proposed. The paper first introduces the research background and related technology of phase change memory technology, introduces the current research status at home and abroad from two aspects of introducing phase change memory into existing computer architecture and data management technology based on phase change memory. This paper focuses on the research work of the existing buffer management algorithm based on mixed main memory, and finds that the buffer hit ratio and partial access mode existing in the current research work cannot reduce the number of write times of the phase change memory, and points out the causes of these problems. Then, based on the traditional LRU buffer management algorithm, this paper improves the page loading mechanism of LRU algorithm according to the requirement of mixed main storage environment, and effectively reduces the number of write times of phase-change memory in the main memory under the premise of ensuring that the hit ratio of the buffer zone is unchanged, and then, The invention provides a page write heat judgment mechanism in a phase change memory and a page switching mechanism between a DRAM/ phase change memory, which effectively solves the problem that the page in the phase change memory becomes a write hot page without reducing the hit rate, By introducing the mechanism into the LRU algorithm which improves the page loading, the algorithm performance is further improved; and finally, the writing burden caused by the permutation operation on the phase-change memory is analyzed in the paper, A buffer management algorithm considering balancing page replacement between DRAM/ phase-change memories is presented. The main contributions of this thesis can be summarized as follows: (1) a new method is proposed "Move Page During Displacement" and a hybrid host buffer management algorithm MHR-LRU based on the LRU algorithm of the policy. when a page replacement occurs, the MHR-LRU loads the requested page into a suitable storage medium according to the page request type through the migration page method between the phase change memory and the DRAM, the invention reduces the number of write operations caused by the loading page and the number of write operations that occur on the phase change memory in the future while ensuring that the hit rate is unchanged, and improves the overall performance of the mixed main memory. (2) on the basis of the MHR-LRU algorithm, the page in the phase change memory becomes a write hot page, An improved algorithm MWQ-LRU (MWQ-LRU) based on page switching mechanism between DRAM/ phase change memory is presented, which takes into account the page's write frequency and the latest write access time to judge whether the page is a write hot page. and the page which is judged as the write hot page in the phase change memory is exchanged with a page with low writing heat in the DRAM. The MWQ-LRU algorithm can save the write hot page as much as possible in the DRAM under the same conditions as the LRU algorithm, and further reduce the number of write times of the phase change memory. (3) Aiming at the problem that the existing buffer management algorithm based on the mixed main memory cannot effectively reduce the writing burden of the phase change memory under the load of the intensive load, the write burden of the phase change memory under the load of the read operation is mainly derived from the page permutation occurring on the phase change memory, In this paper, the influence of page permutation on phase change memory is not concerned, and a mixed main memory buffer management algorithm D-CLOCK considering page replacement is proposed. The algorithm can reduce the write burden caused by the page displacement operation of the phase change memory and keep the hit ratio, and can effectively reduce the number of writing times of the phase change memory under the read intensive load.
【學(xué)位授予單位】：中國(guó)科學(xué)技術(shù)大學(xué)
【學(xué)位級(jí)別】：博士
【學(xué)位授予年份】：2016
【分類號(hào)】：TP333
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7 何亞t，
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