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抗干擾多模兼容導(dǎo)航接收機(jī)射頻芯片關(guān)鍵技術(shù)研究

發(fā)布時(shí)間:2018-05-14 08:58

  本文選題:抗干擾 + 多模兼容。 參考:《華南理工大學(xué)》2016年博士論文


【摘要】:隨著航天工業(yè)的發(fā)展,衛(wèi)星導(dǎo)航系統(tǒng)的開(kāi)發(fā)與應(yīng)用已成為熱點(diǎn)研究領(lǐng)域。衛(wèi)星導(dǎo)航系統(tǒng)為人類提供了多樣性、高質(zhì)量的時(shí)間和位置信息,人類利用這些基本信息,可以進(jìn)一步獲得地圖位置、方向、速度等信息,從而解決了人們“何時(shí)?何處?”的問(wèn)題。目前,人類開(kāi)發(fā)的GPS、北斗、格洛納斯和伽利略等四種導(dǎo)航系統(tǒng)已得到廣泛地應(yīng)用,這極大地促進(jìn)了移動(dòng)互聯(lián)網(wǎng)、云計(jì)算和物聯(lián)網(wǎng)等產(chǎn)業(yè)的發(fā)展,也促進(jìn)了人類社會(huì)的發(fā)展和進(jìn)步。本文圍繞兼容北斗、GPS、格洛納斯和伽利略等導(dǎo)航系統(tǒng)的抗干擾接收機(jī)芯片關(guān)鍵技術(shù)展開(kāi)研究,著重對(duì)接收機(jī)系統(tǒng)的架構(gòu)、抗干擾可重構(gòu)射頻前端、可重構(gòu)濾波器和快速鎖定低噪聲鎖相環(huán)進(jìn)行了深入研究。分析了導(dǎo)航接收機(jī)的系統(tǒng)需求,研究了可重構(gòu)多模兼容導(dǎo)航接收機(jī)的系統(tǒng)架構(gòu)。由于全球四種導(dǎo)航系統(tǒng)信號(hào)頻段覆蓋廣,全兼容導(dǎo)航射頻芯片設(shè)計(jì)難度大,目前雙通道接收機(jī)導(dǎo)航射頻收發(fā)芯片尚未實(shí)現(xiàn)全兼容,為此提出了一種采用可重構(gòu)的雙通道接收機(jī)和單通道發(fā)射機(jī)實(shí)現(xiàn)全兼容的導(dǎo)航射頻芯片架構(gòu)。在綜合考慮了系統(tǒng)功耗、可重構(gòu)性和可行性的基礎(chǔ)上,計(jì)算了多模兼容接收機(jī)的整體指標(biāo)并在系統(tǒng)各個(gè)模塊之間進(jìn)行了合理劃分,為各個(gè)模塊電路的研究和設(shè)計(jì)奠定了基礎(chǔ)。采用SMIC 0.13微米CMOS工藝設(shè)計(jì)了一款覆蓋全頻段RNSS和RDSS頻點(diǎn)的衛(wèi)星導(dǎo)航射頻芯片。流片測(cè)試結(jié)果表明,芯片性能完全滿足四種衛(wèi)星導(dǎo)航系統(tǒng)信號(hào)接收的需求。針對(duì)無(wú)線通訊信號(hào)對(duì)導(dǎo)航系統(tǒng)的干擾,尤其是WIFI和LTE信號(hào)對(duì)北斗導(dǎo)航系統(tǒng)RDSS頻段干擾的問(wèn)題,設(shè)計(jì)了新型的、無(wú)需外置聲表面波濾波器的抗干擾低噪聲射頻前端,實(shí)現(xiàn)了片上高Q值射頻濾波,首次在導(dǎo)航接收機(jī)芯片射頻前端實(shí)現(xiàn)了18dB以上的帶外干擾抑制能力。射頻前端在2.5GHz頻點(diǎn)處的增益為44.98dB,噪聲系數(shù)為2.03dB;采用電流型無(wú)源混頻器和IIP2調(diào)諧,提高了線性度,從而獲得高達(dá)-7dBm的IIP3和+72dBm的IIP2。為了抑制帶外干擾,實(shí)現(xiàn)低中頻/零中頻接收機(jī)可重構(gòu),設(shè)計(jì)了一種新的濾波器電路。該濾波器電路采用有源RC架構(gòu),實(shí)現(xiàn)了階數(shù)可重構(gòu)、低通/帶通可切換,兼容了各種導(dǎo)航系統(tǒng)的頻點(diǎn)和帶寬。在所有導(dǎo)航系統(tǒng)濾波器中,偏移中心頻點(diǎn)2倍帶寬處的帶外抑制均大于38dB,鏡像抑制大于35dB。濾波器帶外抑制能力相比其他導(dǎo)航芯片內(nèi)置濾波器提高了16dB以上。為提高導(dǎo)航接收系統(tǒng)的兼容性,提出了新型的具有雙模自動(dòng)頻率調(diào)諧功能的鎖相環(huán)電路,采用自動(dòng)邏輯控制實(shí)現(xiàn)模式切換。測(cè)試結(jié)果表明,AFC僅耗時(shí)9μs,整個(gè)鎖相環(huán)鎖定時(shí)間為19μs;鎖相環(huán)的頻率覆蓋范圍為2.2~5GHz;在頻率偏移100 kHz處鎖相環(huán)的相位噪聲為-90 dBc/Hz,在頻率偏移1MHz處帶外相位噪聲為-120 dBc/Hz。分析了芯片設(shè)計(jì)中的關(guān)鍵問(wèn)題,優(yōu)化了版圖設(shè)計(jì),測(cè)試了導(dǎo)航射頻芯片的通道增益、噪聲系數(shù)和動(dòng)態(tài)范圍,并對(duì)結(jié)果進(jìn)行了分析對(duì)比。測(cè)試結(jié)果表明,該多模接收機(jī)芯片可兼容所有導(dǎo)航系統(tǒng),通道最大增益為105dB,最小噪聲系數(shù)為3.1dB,動(dòng)態(tài)范圍為85dB,均滿足導(dǎo)航接收機(jī)系統(tǒng)需求。本論文受廣東省產(chǎn)學(xué)研合作項(xiàng)目“BD2/GPS終端設(shè)備核心芯片研發(fā)及產(chǎn)業(yè)化”(2011A090200106)資助,研究成果和創(chuàng)新技術(shù)不僅可以應(yīng)用于衛(wèi)星導(dǎo)航終端設(shè)備的研究與開(kāi)發(fā),也可以運(yùn)用于其他無(wú)線通信系統(tǒng)的終端設(shè)備研發(fā)。
[Abstract]:With the development of the aerospace industry, the development and application of satellite navigation system has become a hot research field. Satellite navigation system provides human diversity, high quality of time and location information, and the human use of these basic information can further obtain map location, direction, speed and other information, so as to solve people "when? Where?" At present, four kinds of navigation systems, such as GPS, Beidou, gilus and Galileo, have been widely used, which greatly promote the development of the mobile Internet, cloud computing and the Internet of things, and promote the development and progress of human society. This article is guided by the navigation of the Beidou, GPS, gilus and Galileo. The key technology of anti-jamming receiver chip is studied. The architecture of the receiver system, the anti jamming reconfigurable RF front end, the reconfigurable filter and the fast locking low noise phase locked loop are deeply studied. The system requirements of the navigation receiver are analyzed, and the system architecture of the reconfigurable multimode compatible navigation receiver is studied. Due to the wide frequency range of the four navigation system in the world, the design of full compatible radio frequency chip is difficult. At present, the dual channel receiver navigation RF transceiver chip has not been fully compatible. A fully compatible radio frequency chip architecture is proposed by using a reconfigurable dual channel receiver and single channel transmitter. Considering the power consumption, reconfigurability and feasibility of the system, the overall index of the multimode compatible receiver is calculated and a reasonable partition is made between the modules of the system, which lays the foundation for the research and design of each module circuit. A satellite guide covering the full band RNSS and RDSS frequency points is designed by using the SMIC 0.13 micron CMOS process. The performance of the chip test shows that the performance of the chip fully meets the needs of the signal reception of the four satellite navigation systems. In view of the interference of the wireless communication signals to the navigation system, especially the interference of the WIFI and LTE signals to the Beidou navigation system RDSS band interference, a new type of anti-interference low noise free surface wave filter is designed. The RF front end of the noise radio frequency front-end has realized the high Q value RF filter on the chip. It is the first time to realize the off band interference suppression above 18dB in the RF front end of the navigation receiver chip. The gain of the RF front end is 44.98dB at the 2.5GHz frequency point and the noise coefficient is 2.03dB, and the current type passive mixer and IIP2 are tuned to improve the linearity, thus getting up to -7d Bm's IIP3 and +72dBm IIP2. have designed a new filter circuit for the reconfiguration of low if / zero IF receiver to suppress off band interference. The filter circuit uses active RC architecture to realize the reconfigurable order, low pass / bandpass switching, compatible with the frequency points and bandwidth of various navigation systems. In all navigation system filters, The off band suppression of the 2 times of the offset center frequency is more than 38dB, and the image suppression is greater than that of the 35dB. filter. Compared with the built-in filter of other navigation chips, the filter is more than 16dB. In order to improve the compatibility of the navigation and receiving system, a new type of PLL with dual mode automatic frequency tuning function is proposed. The test results show that the AFC is only 9 Mu s, the locking time of the whole phase locked loop is 19 s, the frequency coverage range of the PLL is 2.2~5GHz, the phase noise of the phase locked loop is -90 dBc/Hz at the frequency offset 100 kHz, and the phase noise at the frequency offset 1MHz is -120 dBc/Hz. analysis of the key problems in the chip design The layout design is optimized, the channel gain, the noise coefficient and the dynamic range of the RF chip are tested and the results are analyzed and compared. The results show that the multimode receiver chip can be compatible with all navigation systems, the maximum gain of the channel is 105dB, the minimum noise number is 3.1dB, the dynamic range is 85dB, and all the navigation receivers are satisfied. This paper is supported by the project "BD2/GPS terminal equipment core chip R & D and industrialization" (2011A090200106) in Guangdong province. The research and innovation technology can be applied not only to the research and development of satellite navigation terminal equipment, but also to the research and development of the terminal equipment of his wireless communication system.

【學(xué)位授予單位】:華南理工大學(xué)
【學(xué)位級(jí)別】:博士
【學(xué)位授予年份】:2016
【分類號(hào)】:TN965.5

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