【摘要】：符合計(jì)數(shù)器是一種測(cè)量處于糾纏態(tài)下多個(gè)光子之間時(shí)間相關(guān)性的統(tǒng)計(jì)測(cè)量系統(tǒng),它廣泛的應(yīng)用于量子糾纏源的制備、光子干涉實(shí)驗(yàn)、量子隱形傳送、量子密鑰分發(fā)等領(lǐng)域,隨著量子通信和量子計(jì)算的快速發(fā)展,如何提高符合計(jì)數(shù)器裝置的測(cè)量精度成為量子符合測(cè)量領(lǐng)域的一項(xiàng)重要課題。本次設(shè)計(jì)旨在設(shè)計(jì)實(shí)現(xiàn)一種八通道高精度的符合計(jì)數(shù)器系統(tǒng),為了提高符合計(jì)數(shù)器系統(tǒng)的測(cè)量精度,設(shè)計(jì)中提出了時(shí)間內(nèi)插的設(shè)計(jì)思想,符合計(jì)數(shù)器的設(shè)計(jì)工作主要包括硬件設(shè)計(jì)和邏輯設(shè)計(jì)兩大部分,設(shè)計(jì)的重點(diǎn)主要在于FPGA的邏輯設(shè)計(jì)部分。首先,在硬件設(shè)計(jì)方面,處于糾纏態(tài)的多光子分別通過(guò)單光子探測(cè)器將探測(cè)到的光子轉(zhuǎn)換為電脈沖,然后通過(guò)甄別電路對(duì)探測(cè)器輸出的電脈沖進(jìn)行邊沿定時(shí)甄別,論文通過(guò)對(duì)不同甄別電路進(jìn)行比較分析,最終選擇了基于低通濾波器的恒比定時(shí)甄別電路,然后將甄別信號(hào)依次經(jīng)過(guò)脈寬調(diào)整電路、延時(shí)補(bǔ)償電路,最終分別送至FPGA進(jìn)行符合測(cè)量,并將符合測(cè)量的結(jié)果通過(guò)以太網(wǎng)接口傳送到上位機(jī)以供存儲(chǔ)和分析,同時(shí)為了提高符合計(jì)數(shù)器系統(tǒng)的硬件性能,設(shè)計(jì)中對(duì)八個(gè)通道進(jìn)行了差分布線并且使用了射極耦合邏輯電平接口標(biāo)準(zhǔn)。其次,在邏輯設(shè)計(jì)方面,設(shè)計(jì)中采用了粗細(xì)時(shí)間測(cè)量的符合方法,在FPGA內(nèi)部搭建了八路128級(jí)快速進(jìn)位鏈對(duì)符合測(cè)量信號(hào)進(jìn)行時(shí)間內(nèi)插,然后采用200MHz的高速時(shí)鐘鎖存進(jìn)位鏈中信號(hào)的傳輸狀態(tài),鎖存編碼記錄著測(cè)量的細(xì)時(shí)間,同時(shí)采用時(shí)鐘計(jì)數(shù)的方法記錄著測(cè)量的粗時(shí)間。設(shè)計(jì)中為了提高細(xì)時(shí)間的測(cè)量精度,提出了基于相鄰比特編碼糾錯(cuò)的設(shè)計(jì)方法,然后采用二分求和法對(duì)鎖存編碼進(jìn)行譯碼。由于符合測(cè)量過(guò)程中光子到達(dá)時(shí)間的隨機(jī)性,在選取最先到達(dá)信號(hào)作為起始信號(hào)的前提下,提出起始信號(hào)切換方法和符合超時(shí)機(jī)制來(lái)設(shè)置合理的測(cè)量起點(diǎn)。最后利用測(cè)量出來(lái)的時(shí)間值與符合門寬比對(duì)進(jìn)行符合判別,并對(duì)符合判別的結(jié)果做出統(tǒng)計(jì)。本次設(shè)計(jì)通過(guò)多次統(tǒng)計(jì)測(cè)量,最終實(shí)現(xiàn)了符合分辨率為200ps、輸入信號(hào)重復(fù)頻率高達(dá)100MHz的八通道符合計(jì)數(shù)器系統(tǒng),在論文的最后采用設(shè)計(jì)的符合計(jì)數(shù)器和雙光子糾纏源驗(yàn)證貝爾不等式。
[Abstract]:Coincidence counter is a kind of statistical measurement system to measure the time dependence of multiple photons in entangled state. It is widely used in the fields of quantum entanglement source preparation, photon interference experiment, quantum teleportation, quantum key distribution and so on. With the rapid development of quantum communication and quantum computing, how to improve the measurement accuracy of coincidence counter has become an important subject in the field of quantum coincidence measurement. The purpose of this design is to design and implement an eight-channel high-precision coincidence counter system. In order to improve the measuring accuracy of the coincidence counter system, the design idea of time interpolation is put forward in the design. The design of coincidence counter includes two parts: hardware design and logic design. The emphasis of the design is the logic design of FPGA. Firstly, in the aspect of hardware design, the multi-photon in the entangled state converts the detected photon into an electric pulse through the single-photon detector, and then the detector outputs the electric pulse by the discriminating circuit. Through the comparison and analysis of different discriminating circuits, the constant ratio timing discriminating circuit based on low pass filter is selected, and then the discriminant signal is passed through the pulse width adjustment circuit and the delay compensation circuit in turn. Finally, the conformance measurement is sent to FPGA, and the result of compliance measurement is transmitted to the upper computer through Ethernet interface for storage and analysis. At the same time, in order to improve the hardware performance of the conformance counter system, In the design, eight channels are divided and the emitter coupled logic level interface standard is used. Secondly, in the aspect of logic design, the coincidence method of thick time measurement is adopted in the design. Eight 128-level fast carry chains are built in FPGA to interpolate the coincidence signal. Then the transmission state of the signal in the carry chain is latched by 200MHz's high speed clock. The latch code records the fine time measured and the coarse time is recorded by the method of clock counting. In order to improve the precision of fine time measurement, a design method based on adjacent bit coding and error correction is proposed, and then the binary sum method is used to decode latch codes. Due to the randomness of photon arrival time in the process of coincidence measurement, under the premise of selecting the first arrival signal as the starting signal, the switching method of the initial signal and the coincidence time-out mechanism are proposed to set a reasonable measurement starting point. Finally, the measured time value and the width of the coincidence gate are used to distinguish the coincidence, and the result of the coincidence discrimination is statistically analyzed. Through many statistical measurements, this design has finally realized an eight-channel coincidence counter system with a coincidence resolution of 200 psand a repetition rate of up to 100MHz. At the end of the thesis, the designed counter and two-photon entanglement source are used to verify Bell's inequality.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2016
【分類號(hào)】：TH724

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