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基于沖激體制的近炸引信系統(tǒng)研制

發(fā)布時(shí)間:2019-03-19 13:50
【摘要】:近年來(lái),沖激體制的無(wú)線通信廣泛受到了專家學(xué)者的關(guān)注,并逐漸應(yīng)用到各個(gè)領(lǐng)域,主要包括軍事雷達(dá)、民用雷達(dá)、電子對(duì)抗、反隱身、儀器儀表、超寬帶通信等領(lǐng)域。沖激體制的通信方式憑借其分辨率高、抗干擾能力強(qiáng)、定位精確、硬件結(jié)構(gòu)簡(jiǎn)單等優(yōu)勢(shì)呈現(xiàn)出良好的發(fā)展勢(shì)態(tài),但同時(shí)也面臨著巨大的技術(shù)性挑戰(zhàn)。本文基于沖激體制無(wú)線通信中的各種優(yōu)勢(shì),設(shè)計(jì)研制了基于沖激體制的近炸引信系統(tǒng)。文章內(nèi)容主要涵蓋了低壓超寬帶脈沖源設(shè)計(jì),超寬帶信號(hào)接收機(jī)設(shè)計(jì),整機(jī)數(shù)字邏輯設(shè)計(jì)三部分內(nèi)容。在低壓脈沖源設(shè)計(jì)方面,分析了SRD(階躍恢復(fù)二極管)的工作機(jī)理,研究了幾種典型電路結(jié)構(gòu)。在ADS軟件中對(duì)各個(gè)電路分別進(jìn)行了仿真,分析了各個(gè)器件對(duì)結(jié)果的影響。進(jìn)而逐步優(yōu)化了電路結(jié)構(gòu),并在仿真結(jié)果的指導(dǎo)下進(jìn)行了實(shí)驗(yàn)測(cè)試。該脈沖源電路具有結(jié)構(gòu)簡(jiǎn)單、體積小、成本低、性能穩(wěn)定等優(yōu)點(diǎn)。在超寬帶接收機(jī)方面,研究探討了幾種經(jīng)典的接收方案,結(jié)合近炸引信這一特殊應(yīng)用領(lǐng)域,設(shè)計(jì)出相應(yīng)的接收電路。本設(shè)計(jì)采用高速比較器的鎖存功能來(lái)將接收到的窄脈沖比較結(jié)果鎖存下來(lái),高精度延時(shí)器結(jié)合主控邏輯部分在脈沖回波到來(lái)時(shí)準(zhǔn)確鎖定高速比較器,實(shí)現(xiàn)脈沖展寬,同時(shí)達(dá)到數(shù)字化目的。在數(shù)字邏輯設(shè)計(jì)方面,采用編碼方式來(lái)提高抗干擾能力。八位編碼通過(guò)移位寄存器逐位移出觸發(fā)脈沖源發(fā)射窄脈沖,然后在回波到來(lái)后用移位寄存器逐位移入八位已經(jīng)數(shù)字化的編碼,兩者相比較來(lái)判斷是否點(diǎn)火引爆炸彈。整個(gè)數(shù)字邏輯部分采用FPGA(可編程邏輯門陣列)來(lái)實(shí)現(xiàn),與傳統(tǒng)分立數(shù)字器件比較,它具有集成度高,開(kāi)發(fā)周期短,性能穩(wěn)定等優(yōu)勢(shì)。本設(shè)計(jì)采用ALTERA公司的CycloneIII系列的FPGA,首先在開(kāi)發(fā)軟件QuartusII中進(jìn)行電路模塊設(shè)計(jì),然后在仿真軟件ModelSim中進(jìn)行邏輯仿真,最后下載到FPGA芯片上進(jìn)行實(shí)測(cè)。
[Abstract]:In recent years, the wireless communication of impulse system has been paid more and more attention by experts and scholars, and has been gradually applied to various fields, such as military radar, civil radar, electronic countermeasure, anti-stealth, instrumentation, ultra-wideband communication and so on. Because of its advantages such as high resolution, strong anti-jamming ability, accurate positioning and simple hardware structure, the communication mode of impulse system presents a good development trend, but it is also facing huge technical challenges at the same time. Based on the advantages of wireless communication in impulse system, a proximity fuze system based on impulse mechanism is designed and developed in this paper. The main contents of this paper include the design of low-voltage ultra-wideband pulse source, the design of ultra-wideband signal receiver and the digital logic design of the whole machine. In the design of low voltage pulse source, the working mechanism of SRD (step recovery diode) is analyzed, and several typical circuit structures are studied. Each circuit is simulated in ADS software, and the influence of each device on the result is analyzed. Furthermore, the circuit structure is optimized step by step, and the experiment is carried out under the guidance of the simulation results. The pulse source circuit has the advantages of simple structure, small volume, low cost and stable performance. In the aspect of UWB receiver, several classical receiving schemes are studied and discussed. Combining with the special application field of proximity fuze, the corresponding receiving circuit is designed. In this design, the latch function of the high-speed comparator is used to latch the received narrow pulse comparison results, and the high-precision delay device combined with the main control logic part locks the high-speed comparator accurately when the pulse echo arrives, so that the pulse broadening can be realized. At the same time achieve the purpose of digitization. In the aspect of digital logic design, the coding method is adopted to improve the anti-jamming ability. The eight-bit code transmits narrow pulses by bit-by-bit shift registers out of the trigger pulse source, and then uses the shift registers to bit-by-bit into the eight-bit already digitized code after the echo arrives, and compares the two to determine whether to ignite the bomb or not. The whole digital logic part is realized by FPGA (Programmable Logic Gate Array). Compared with the traditional discrete digital devices, it has the advantages of high integration, short development period and stable performance. This design uses the FPGA, of CycloneIII series of ALTERA company to design the circuit module in the development software QuartusII firstly, then carries on the logic simulation in the simulation software ModelSim, finally downloads to the FPGA chip to carry on the measurement.
【學(xué)位授予單位】:電子科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2014
【分類號(hào)】:TN92

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