電力線OFDM載波通信系統(tǒng)的FPGA原型設(shè)計(jì)
發(fā)布時(shí)間：2018-12-15 14:20
【摘要】：電力線載波通信(Power line communication, PLC)利用現(xiàn)有的電力線網(wǎng)絡(luò)進(jìn)行信息傳輸，無(wú)需重新布線，具有成本低、周期短、安裝使用方便等一系列優(yōu)點(diǎn)，在智能電網(wǎng)、智能家居、智能交通等領(lǐng)域應(yīng)用廣泛。近年來(lái)基于正交頻分復(fù)用(orthogonal frequency division multiplexing,OFDM)技術(shù)的PLC被多個(gè)國(guó)際PLC標(biāo)準(zhǔn)組織所采納，成為PLC領(lǐng)域的研究熱點(diǎn)。基于OFDM技術(shù)的G3-PLC標(biāo)準(zhǔn)是由法國(guó)電力分銷(xiāo)公司ERDF發(fā)起，Sagemcom和Maxim公司聯(lián)合開(kāi)發(fā)的用于智能電網(wǎng)的窄帶PLC標(biāo)準(zhǔn)。本文在同步和信道估計(jì)等算法研究的基礎(chǔ)上，設(shè)計(jì)了一種基于G3-PLC標(biāo)準(zhǔn)的電力線OFDM載波通信物理層FPGA原型系統(tǒng)。本文的主要工作如下： 1.在深入研究G3-PLC定時(shí)同步算法的基礎(chǔ)上，改進(jìn)了基于本地序列相關(guān)的定時(shí)同步算法，并對(duì)其進(jìn)行了仿真。分析表明，改進(jìn)的定時(shí)同步算法具有更高的精度，，適用的信噪比范圍更寬。 2．針對(duì)G3-PLC標(biāo)準(zhǔn)特定的導(dǎo)頻結(jié)構(gòu)，提出了一種基于循環(huán)訓(xùn)練序列的信道估計(jì)方法，該方法實(shí)現(xiàn)復(fù)雜度低、資源消耗少、可兼容多種頻段傳輸模式。仿真結(jié)果表明，本文方法提高了信道估計(jì)的性能，在低信噪比條件下效果更好。 3.針對(duì)G3-PLC標(biāo)準(zhǔn)物理層協(xié)議，搭建了全部物理層收發(fā)模塊的MATLAB定點(diǎn)仿真平臺(tái)，為FPGA原型系統(tǒng)設(shè)計(jì)提供了依據(jù)。通過(guò)定點(diǎn)仿真優(yōu)化了FPGA原型系統(tǒng)的結(jié)構(gòu)，據(jù)此，提出了一種G3-PLC物理層原型系統(tǒng)的總體設(shè)計(jì)方案，可兼容多種頻帶傳輸模式，并兼顧了系統(tǒng)性能和資源消耗的折中。 4.完成了G3-PLC物理層發(fā)射機(jī)模塊的FPGA代碼設(shè)計(jì)，包括加擾頻、RS編碼、卷積編碼、重復(fù)編碼、交織、映射調(diào)制和OFDM調(diào)制。本文對(duì)發(fā)射機(jī)輸出的仿真信號(hào)與定點(diǎn)仿真的信號(hào)進(jìn)行了比較，驗(yàn)證了設(shè)計(jì)結(jié)果的正確性。 5．完成了G3-PLC物理層接收機(jī)模塊的FPGA代碼設(shè)計(jì)，主要模塊包括幀同步子系統(tǒng)，自動(dòng)增益控制子系統(tǒng)，信道估計(jì)子系統(tǒng)， OFDM解調(diào)器，信道譯碼子系統(tǒng)等。本文在實(shí)驗(yàn)室的信號(hào)處理硬件平臺(tái)上對(duì)接收機(jī)進(jìn)行了實(shí)驗(yàn)驗(yàn)證，結(jié)果驗(yàn)證了所設(shè)計(jì)原型系統(tǒng)的正確性。實(shí)驗(yàn)中FPGA采用XILINX公司SPARTAN-6系列XC6SLX150T芯片，接收機(jī)所消耗的資源約占FPGA總資源的15%左右。 本文完成了G3-PLC物理層原型系統(tǒng)的設(shè)計(jì)與驗(yàn)證，為下一步集成電路設(shè)計(jì)打下了堅(jiān)實(shí)的基礎(chǔ)，對(duì)我國(guó)電力線OFDM載波通信技術(shù)的廣泛應(yīng)用有重要意義。
[Abstract]:Power line carrier communication (Power line communication, PLC) makes use of the existing power line network to transmit information without rewiring. It has a series of advantages, such as low cost, short period, convenient installation and use, etc., in smart grid, smart home, etc. Intelligent transportation and other fields are widely used. In recent years, PLC based on orthogonal Frequency Division Multiplexing (orthogonal frequency division multiplexing,OFDM) technology has been adopted by many international PLC standard organizations, and has become a research hotspot in the field of PLC. The G3-PLC standard based on OFDM technology is a narrow band PLC standard for smart grid developed by ERDF, a French power distribution company, and jointly developed by Sagemcom and Maxim. Based on the research of synchronization and channel estimation algorithms, a prototype FPGA system based on G3-PLC standard for power line OFDM carrier communication physical layer is designed in this paper. The main work of this paper is as follows: 1. On the basis of deeply studying the timing synchronization algorithm of G3-PLC, this paper improves the timing synchronization algorithm based on local sequence correlation, and simulates it. The analysis shows that the improved timing synchronization algorithm has higher accuracy and wider range of signal-to-noise ratio. 2. Aiming at the specific pilot structure of G3-PLC standard, a channel estimation method based on cyclic training sequence is proposed. This method has the advantages of low complexity, low resource consumption and compatible with multiple frequency band transmission modes. The simulation results show that the proposed method improves the performance of channel estimation and achieves better performance under low signal-to-noise ratio (SNR). 3. Aiming at the G3-PLC standard physical layer protocol, the MATLAB fixed-point simulation platform of all physical layer transceiver modules is built, which provides the basis for the design of FPGA prototype system. The structure of FPGA prototype system is optimized by fixed-point simulation. Based on this, an overall design scheme of G3-PLC physical layer prototype system is proposed, which can be compatible with multi-band transmission modes and takes into account the compromise between system performance and resource consumption. 4. The FPGA code design of G3-PLC physical layer transmitter module is completed, including scrambling frequency, RS coding, convolution coding, repeat coding, interleaving, mapping modulation and OFDM modulation. In this paper, the simulation signal output by the transmitter is compared with that of the fixed point simulation signal, and the correctness of the design results is verified. 5. The FPGA code design of G3-PLC physical layer receiver module is completed. The main modules include frame synchronization subsystem, automatic gain control subsystem, channel estimation subsystem, OFDM demodulator, channel decoding subsystem and so on. The experimental results of the receiver on the signal processing hardware platform of the laboratory verify the correctness of the designed prototype system. In the experiment, XILINX SPARTAN-6 series XC6SLX150T chip is used in FPGA, and the resource consumed by the receiver is about 15% of the total FPGA resource. This paper has completed the design and verification of G3-PLC physical layer prototype system, which has laid a solid foundation for the next integrated circuit design, and has great significance for the wide application of power line OFDM carrier communication technology in China.
【學(xué)位授予單位】：南京航空航天大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類(lèi)號(hào)】：TN913.6
本文編號(hào)：2380808
[Abstract]:Power line carrier communication (Power line communication, PLC) makes use of the existing power line network to transmit information without rewiring. It has a series of advantages, such as low cost, short period, convenient installation and use, etc., in smart grid, smart home, etc. Intelligent transportation and other fields are widely used. In recent years, PLC based on orthogonal Frequency Division Multiplexing (orthogonal frequency division multiplexing,OFDM) technology has been adopted by many international PLC standard organizations, and has become a research hotspot in the field of PLC. The G3-PLC standard based on OFDM technology is a narrow band PLC standard for smart grid developed by ERDF, a French power distribution company, and jointly developed by Sagemcom and Maxim. Based on the research of synchronization and channel estimation algorithms, a prototype FPGA system based on G3-PLC standard for power line OFDM carrier communication physical layer is designed in this paper. The main work of this paper is as follows: 1. On the basis of deeply studying the timing synchronization algorithm of G3-PLC, this paper improves the timing synchronization algorithm based on local sequence correlation, and simulates it. The analysis shows that the improved timing synchronization algorithm has higher accuracy and wider range of signal-to-noise ratio. 2. Aiming at the specific pilot structure of G3-PLC standard, a channel estimation method based on cyclic training sequence is proposed. This method has the advantages of low complexity, low resource consumption and compatible with multiple frequency band transmission modes. The simulation results show that the proposed method improves the performance of channel estimation and achieves better performance under low signal-to-noise ratio (SNR). 3. Aiming at the G3-PLC standard physical layer protocol, the MATLAB fixed-point simulation platform of all physical layer transceiver modules is built, which provides the basis for the design of FPGA prototype system. The structure of FPGA prototype system is optimized by fixed-point simulation. Based on this, an overall design scheme of G3-PLC physical layer prototype system is proposed, which can be compatible with multi-band transmission modes and takes into account the compromise between system performance and resource consumption. 4. The FPGA code design of G3-PLC physical layer transmitter module is completed, including scrambling frequency, RS coding, convolution coding, repeat coding, interleaving, mapping modulation and OFDM modulation. In this paper, the simulation signal output by the transmitter is compared with that of the fixed point simulation signal, and the correctness of the design results is verified. 5. The FPGA code design of G3-PLC physical layer receiver module is completed. The main modules include frame synchronization subsystem, automatic gain control subsystem, channel estimation subsystem, OFDM demodulator, channel decoding subsystem and so on. The experimental results of the receiver on the signal processing hardware platform of the laboratory verify the correctness of the designed prototype system. In the experiment, XILINX SPARTAN-6 series XC6SLX150T chip is used in FPGA, and the resource consumed by the receiver is about 15% of the total FPGA resource. This paper has completed the design and verification of G3-PLC physical layer prototype system, which has laid a solid foundation for the next integrated circuit design, and has great significance for the wide application of power line OFDM carrier communication technology in China.
【學(xué)位授予單位】：南京航空航天大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類(lèi)號(hào)】：TN913.6
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