天堂国产午夜亚洲专区-少妇人妻综合久久蜜臀-国产成人户外露出视频在线-国产91传媒一区二区三区

超短波無(wú)線通信軟件無(wú)線電數(shù)字平臺(tái)的設(shè)計(jì)與實(shí)現(xiàn)

發(fā)布時(shí)間:2018-11-15 19:29
【摘要】:理想的軟件無(wú)線電架構(gòu)由可重新配置的數(shù)字無(wú)線電、植入阻抗合成器的軟件可調(diào)無(wú)線電和軟件可調(diào)天線系統(tǒng)三個(gè)主要單元組成。軟件無(wú)線電最初被認(rèn)為是在協(xié)同工作、廣義范圍內(nèi)無(wú)線互通、多模式、多標(biāo)準(zhǔn)等方面具有廣闊前景的無(wú)線電通信系統(tǒng)應(yīng)用解決方案,是未來(lái)無(wú)線通信和全球電信技術(shù)發(fā)展的新方向。本方案的目的是實(shí)現(xiàn)一個(gè)通用化、開放化、模塊化架構(gòu)的軟件無(wú)線電硬件平臺(tái),由于硬件如A/D,D/A轉(zhuǎn)換和DSP和FPGA等處理器性能的限制,我們無(wú)法采用理想軟件無(wú)線電模型的架構(gòu);诋(dāng)前集成電路技術(shù)和無(wú)線通信技術(shù)的發(fā)展,我們采用了中頻數(shù)字化的系統(tǒng)框架,即先通過射頻前端將射頻信號(hào)轉(zhuǎn)換至中頻,數(shù)字平臺(tái)實(shí)現(xiàn)中頻和基帶之間的轉(zhuǎn)換,然后再由基帶單元進(jìn)行信號(hào)處理。軟件設(shè)計(jì)上采用基于SCA架構(gòu)的統(tǒng)一處理體系,實(shí)現(xiàn)組件化、模塊化實(shí)現(xiàn)方式,方便裁剪和異構(gòu),和數(shù)字硬件平臺(tái)一起構(gòu)建了實(shí)用的軟件無(wú)線電通信平臺(tái)。本方案實(shí)現(xiàn)的軟件無(wú)線電架構(gòu),核心單元是一個(gè)基帶信號(hào)數(shù)字處理硬件平臺(tái),主要設(shè)計(jì)內(nèi)容有:軟件無(wú)線電理論的研究、數(shù)字平臺(tái)設(shè)計(jì)與實(shí)現(xiàn)、總體方案的論證編寫、核心處理器的選擇、電路原理圖設(shè)計(jì)、PCB實(shí)現(xiàn)、數(shù)字平臺(tái)的調(diào)試與驗(yàn)證,硬件底層驅(qū)動(dòng)程序的編寫。概述了軟件無(wú)線電的發(fā)展歷程及現(xiàn)狀,闡述了信號(hào)采樣理論與多速率信號(hào)處理理論等數(shù)字信號(hào)處理相關(guān)理論基礎(chǔ)。本方案采用DSP+FPGA+GPP的框架作為本次設(shè)計(jì)指導(dǎo)思想。整個(gè)硬件平臺(tái)分為黑邊基帶單元和紅邊業(yè)務(wù)接口單元兩部分。DSP基帶板的核心芯片采用TI的TMS320C6416,FPGA芯片采用的是Xilinx公司VirtexII系列FPGA中的XC2V3000。設(shè)計(jì)使用Cadence 15.5完成了電路原理圖和高速PCB設(shè)計(jì)。在理論分析的基礎(chǔ)上,結(jié)合基帶數(shù)字電路技術(shù)發(fā)展,最終設(shè)計(jì)實(shí)現(xiàn)了一款通用的軟件無(wú)線電架構(gòu)的數(shù)字硬件平臺(tái),通過GPP+FPGA+DSP的框架架構(gòu)實(shí)現(xiàn)了基帶數(shù)字電路,最后通過單板調(diào)試和整機(jī)功能測(cè)試,正確實(shí)現(xiàn)了數(shù)字平臺(tái)的設(shè)計(jì)功能。
[Abstract]:The ideal software radio architecture consists of three main units: a reconfigurable digital radio, a software tunable radio embedded in an impedance synthesizer and a software tunable antenna system. Software radio was originally considered as a promising solution for wireless communication systems with broad prospects for collaborative work, wireless interworking in a broad sense, multi-mode, multi-standard, and so on. Is the future wireless communication and the global telecommunication technology development new direction. The purpose of this scheme is to implement a software radio hardware platform with a general, open and modular architecture, which is limited by the performance of hardware such as A / D / A conversion and DSP and FPGA processors. We cannot adopt the architecture of the ideal software radio model. Based on the development of current integrated circuit technology and wireless communication technology, we adopt the system framework of if digitization, that is, the RF signal is converted to if through RF front-end, and the digital platform realizes the conversion between if and baseband. The signal is then processed by the baseband unit. In software design, a unified processing system based on SCA architecture is adopted to realize componentization and modularization, which is convenient for cutting and heterogeneous, and a practical software radio communication platform is constructed together with the digital hardware platform. The core unit of the software radio architecture is a hardware platform for baseband signal digital processing. The main design contents are: the research of software radio theory, the design and implementation of digital platform, the argumentation and compilation of the overall scheme. Core processor selection, circuit schematic design, PCB implementation, digital platform debugging and verification, hardware bottom driver programming. In this paper, the development and present situation of software radio are summarized, and the related theories of digital signal processing, such as signal sampling theory and multi-rate signal processing theory, are expounded. This project adopts the framework of DSP FPGA GPP as the guiding principle of this design. The whole hardware platform is divided into two parts: black edge baseband unit and red edge service interface unit. The core chip of DSP baseband board is TI's TMS320C6416,FPGA chip, which is the XC2V3000. of VirtexII series FPGA of Xilinx Company. The circuit schematic diagram and high speed PCB are designed with Cadence 15. 5. On the basis of theoretical analysis, combined with the development of baseband digital circuit technology, a digital hardware platform of a general software radio architecture is designed and implemented. The baseband digital circuit is realized through the framework of GPP FPGA DSP. Finally, the design function of the digital platform is realized correctly through the debugging of the single board and the testing of the function of the whole machine.
【學(xué)位授予單位】:電子科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2014
【分類號(hào)】:TN925

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 沙燕萍,皇甫偉,曾烈光;異步FIFO的VHDL設(shè)計(jì)[J];電子技術(shù)應(yīng)用;2001年06期

,

本文編號(hào):2334227

資料下載
論文發(fā)表

本文鏈接:http://sikaile.net/kejilunwen/wltx/2334227.html


Copyright(c)文論論文網(wǎng)All Rights Reserved | 網(wǎng)站地圖 |

版權(quán)申明:資料由用戶6197a***提供,本站僅收錄摘要或目錄,作者需要?jiǎng)h除請(qǐng)E-mail郵箱bigeng88@qq.com
亚洲一区二区亚洲日本| 日韩精品一级一区二区| 在线免费不卡亚洲国产| 好吊日在线视频免费观看| 内射精品欧美一区二区三区久久久| 日本欧美视频在线观看免费| 国产精品一区二区不卡中文| 中文字幕中文字幕在线十八区| 国自产拍偷拍福利精品图片| 久久精品a毛片看国产成人| 又大又紧又硬又湿又爽又猛| 丰满少妇被猛烈插入在线观看| 欧美丝袜诱惑一区二区| 二区久久久国产av色| 亚洲一区二区三区一区| 亚洲色图欧美另类人妻| 日韩中文高清在线专区| 国产精品福利一二三区| 欧美日韩国产黑人一区| 熟女少妇一区二区三区蜜桃| 中国日韩一级黄色大片| 午夜福利黄片免费观看| 成人午夜免费观看视频| 老司机精品视频免费入口| 国产肥妇一区二区熟女精品| 久久精品久久精品中文字幕| 粉嫩国产一区二区三区在线| 在线欧美精品二区三区| 国产美女网红精品演绎| 国产精品欧美在线观看| 丰满人妻熟妇乱又伦精另类视频 | 少妇丰满a一区二区三区| 国产精品制服丝袜美腿丝袜| 精品女同在线一区二区| 国产不卡视频一区在线| 欧美精品久久一二三区| 色偷偷偷拍视频在线观看| 日本不卡一区视频欧美| 五月婷婷亚洲综合一区| 亚洲视频在线观看你懂的| 麻豆tv传媒在线观看|