高速率LDPC編譯碼器設(shè)計(jì)與實(shí)現(xiàn)
[Abstract]:LDPC codes are linear block codes that are completely determined by its parity matrix. LDPC codes were first proposed by Gallager in his doctoral thesis in the 1960s, and for a long time thereafter, due to the lack of feasible efficient decoding algorithms, Has been ignored by people. It was not until 1981, when Tanner put forward a graphic representation of LDPC codes, that is, the Tanner diagrams that were known to many people, that LDPC codes came back to the attention of scientists. In 1995, MacKay and Neal, and so on, made unremitting research through their own studies. A LDPC decoding algorithm with good performance and easy implementation is proposed. The research of high performance LDPC code algorithm comes to the forefront of scientific research again. Now, with the development of more than ten years, the related technology of LDPC code has matured day by day, and even entered the commercial application market, and has been written into the wireless communication and other related field standards. With the rapid development of broadband communication in the future, the traditional BP decoding algorithm of LDPC, LLR BP decoding algorithm, SPA decoding algorithm and other traditional algorithms can no longer meet the requirement of fast decoding for large scale integrated circuit operation. An efficient algorithm based on traditional decoding algorithm has been proposed, which is the original intention of applying probabilistic computation to LDPC decoding. Its core idea is to use random bit streams as continuous values. A simple bit operation can be used to calculate complex algorithms. One obvious advantage of probability calculation is that the hardware implementation of probabilistic algorithms is much simpler than that of traditional cardinality algorithms. For example, multiplication is implemented by only one and gate operation. The architecture of scaling is a multiplexer. The simplicity of hardware results in the shortening of critical paths and the reduction of power consumption. In addition, all bits in a random bit stream have the same meaning, which means that the probabilistic algorithm is a univariate algorithm with better fault-tolerant coding than the traditional algorithm. In this paper, the sequence correlation theory and experimental analysis of the FPGA implementation and probability calculation of multi-rate LDPC codec and decode system are studied. The main work and innovation are as follows: 1. The main contents of this paper are as follows: the design of LDPC codec and simulation test platform are completed and the function test is completed. 2. The correlation of probabilistic sequence transformed in probability calculation is studied. The main contents are as follows: the influence of correlation of probabilistic sequence on the whole decoding performance is studied; 3. The FPGA development process of multi-rate LDPC decoder is completed. The main contents are as follows: using Virtex6/7 series of 475T/485T chips to complete the BER and the bottom board measurement of the number of iterations of DC under different SNR conditions.
【學(xué)位授予單位】:電子科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2014
【分類號(hào)】:TN911.22
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