微型SAR數(shù)字處理組件設(shè)計(jì)
發(fā)布時(shí)間：2018-10-18 19:36
【摘要】：合成孔徑雷達(dá)(SAR)成像利用合成孔徑原理和脈沖壓縮技術(shù),突破了天線(xiàn)孔徑對(duì)方位向分辨率的限制,實(shí)現(xiàn)了對(duì)遠(yuǎn)距離目標(biāo)進(jìn)行二維高分辨率成像。但是傳統(tǒng)的SAR系統(tǒng)結(jié)構(gòu)復(fù)雜,體積大,能耗高,限制了SAR的大規(guī)模應(yīng)用。因此,研制體積小,重量輕,功耗低的微型SAR系統(tǒng)意義重大。本文設(shè)計(jì)了一種新的微型SAR數(shù)字處理組件,所取得的主要研究成果為:1.根據(jù)微型SAR系統(tǒng)提出的技術(shù)指標(biāo),計(jì)算得到微型SAR數(shù)字處理組件的參數(shù)要求,依據(jù)這些參數(shù)設(shè)計(jì)了一種新的針對(duì)微型SAR成像系統(tǒng)的數(shù)字處理組件,即以?xún)?nèi)嵌處理器核的單片現(xiàn)場(chǎng)可編程門(mén)陣列(FPGA)為核心,外接數(shù)模轉(zhuǎn)換(DA),模數(shù)轉(zhuǎn)換(AD)和閃存(FLASH)等多種芯片來(lái)實(shí)現(xiàn)信號(hào)產(chǎn)生,回波采集,數(shù)據(jù)處理和圖像存儲(chǔ)等功能,完成微型SAR的實(shí)時(shí)成像。2.詳細(xì)介紹了微型SAR數(shù)字處理組件上各個(gè)模塊的硬件設(shè)計(jì),包括技術(shù)指標(biāo),功能描述,芯片選型和電路設(shè)計(jì)。同時(shí)針對(duì)數(shù)字處理板卡特定的尺寸要求,即長(zhǎng)度不大于120毫米,寬度不大于80毫米,介紹了具體印制電路板(PCB)布局和布線(xiàn)方法,在滿(mǎn)足尺寸的前提下利用布局和布線(xiàn)來(lái)提高系統(tǒng)性能。3.對(duì)微型SAR成像系統(tǒng)的軟件設(shè)計(jì)進(jìn)行了詳細(xì)闡述,包括成像程序的總體設(shè)計(jì),雷達(dá)定時(shí)時(shí)序設(shè)計(jì),DA程序,AD程序,FLASH程序,伺服驅(qū)動(dòng)程序和接口模塊程序設(shè)計(jì)。而且對(duì)主要模塊進(jìn)行了功能測(cè)試,給出測(cè)試方法和步驟,得到測(cè)試結(jié)果符合指標(biāo)要求。4.在設(shè)計(jì)DA程序時(shí),采用了一種新的波形產(chǎn)生方法。利用FPGA中處理器系統(tǒng)(PS)和可編程邏輯(PL)之間的AXI互聯(lián)總線(xiàn),通過(guò)PS中的數(shù)學(xué)函數(shù)更新PL中存儲(chǔ)器的波形,實(shí)現(xiàn)任意波形的實(shí)時(shí)產(chǎn)生和波形補(bǔ)償。5.對(duì)PS和PL之間的數(shù)據(jù)通信進(jìn)行了研究,介紹了幾種主要的通信方式,闡述了其特點(diǎn)和優(yōu)劣。并針對(duì)回波采集模塊,提出了具體的實(shí)現(xiàn)方法。6.設(shè)計(jì)了針對(duì)圖像存儲(chǔ)的文件系統(tǒng)。文件系統(tǒng)在PS中用C語(yǔ)言實(shí)現(xiàn),能提供寫(xiě)文件,讀文件,刪文件等簡(jiǎn)單命令。使用戶(hù)可以直接通過(guò)上位機(jī)界面控制數(shù)字處理組件進(jìn)行圖像存儲(chǔ)和讀取,屏蔽底層FLASH的具體操作,提高系統(tǒng)的人機(jī)交互能力。
[Abstract]:Using the principle of synthetic aperture and pulse compression, (SAR) imaging of synthetic Aperture Radar (SAR) breaks through the limitation of antenna aperture to azimuth resolution and realizes two-dimensional high-resolution imaging of long range target. However, the traditional SAR system has complex structure, large volume and high energy consumption, which limits the large-scale application of SAR. Therefore, it is of great significance to develop a miniature SAR system with small volume, light weight and low power consumption. A new miniature SAR digital processing module is designed in this paper. The main research results are as follows: 1. According to the technical index proposed by the micro SAR system, the parameter requirements of the micro SAR digital processing module are calculated. According to these parameters, a new digital processing module for the micro SAR imaging system is designed. That is to say, the single-chip field programmable gate array (FPGA) with embedded processor core is used as the core, and a variety of chips, such as digital-to-analog conversion (DA), analog-to-digital conversion (AD) and flash memory (FLASH), are added to realize the functions of signal generation, echo acquisition, data processing and image storage. Complete micro SAR real-time imaging. 2. The hardware design of each module on the miniature SAR digital processing module is introduced in detail, including technical index, function description, chip selection and circuit design. At the same time, according to the special size requirement of the digital processing board, that is, the length is not more than 120mm and the width is not more than 80mm, this paper introduces the (PCB) layout and wiring method of the printed circuit board. Use layout and wiring to improve system performance on the premise of satisfying dimensions. 3. The software design of micro SAR imaging system is described in detail, including the overall design of imaging program, radar timing design, DA program, AD program, FLASH program, servo driver program and interface module program design. Furthermore, the main modules are tested, and the test methods and steps are given, and the test results meet the requirements of the index. 4. 4. In the design of DA program, a new waveform generation method is adopted. Using the AXI interconnection bus between the processor system (PS) and the programmable logic (PL) in FPGA, the waveform of the memory in PL is updated by the mathematical function in PS, and the real-time generation and waveform compensation of any waveform are realized. 5. This paper studies the data communication between PS and PL, introduces several main communication methods, and expounds its characteristics and advantages and disadvantages. And for echo acquisition module, the specific implementation method. 6. 6. A file system for image storage is designed. File system is implemented in C language in PS. It can provide simple commands such as writing files, reading files, deleting files and so on. The user can store and read the image directly through the upper computer interface control digital processing module, shield the concrete operation of the bottom FLASH, and improve the man-machine interaction ability of the system.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類(lèi)號(hào)】：TN957.52
本文編號(hào)：2280158
[Abstract]:Using the principle of synthetic aperture and pulse compression, (SAR) imaging of synthetic Aperture Radar (SAR) breaks through the limitation of antenna aperture to azimuth resolution and realizes two-dimensional high-resolution imaging of long range target. However, the traditional SAR system has complex structure, large volume and high energy consumption, which limits the large-scale application of SAR. Therefore, it is of great significance to develop a miniature SAR system with small volume, light weight and low power consumption. A new miniature SAR digital processing module is designed in this paper. The main research results are as follows: 1. According to the technical index proposed by the micro SAR system, the parameter requirements of the micro SAR digital processing module are calculated. According to these parameters, a new digital processing module for the micro SAR imaging system is designed. That is to say, the single-chip field programmable gate array (FPGA) with embedded processor core is used as the core, and a variety of chips, such as digital-to-analog conversion (DA), analog-to-digital conversion (AD) and flash memory (FLASH), are added to realize the functions of signal generation, echo acquisition, data processing and image storage. Complete micro SAR real-time imaging. 2. The hardware design of each module on the miniature SAR digital processing module is introduced in detail, including technical index, function description, chip selection and circuit design. At the same time, according to the special size requirement of the digital processing board, that is, the length is not more than 120mm and the width is not more than 80mm, this paper introduces the (PCB) layout and wiring method of the printed circuit board. Use layout and wiring to improve system performance on the premise of satisfying dimensions. 3. The software design of micro SAR imaging system is described in detail, including the overall design of imaging program, radar timing design, DA program, AD program, FLASH program, servo driver program and interface module program design. Furthermore, the main modules are tested, and the test methods and steps are given, and the test results meet the requirements of the index. 4. 4. In the design of DA program, a new waveform generation method is adopted. Using the AXI interconnection bus between the processor system (PS) and the programmable logic (PL) in FPGA, the waveform of the memory in PL is updated by the mathematical function in PS, and the real-time generation and waveform compensation of any waveform are realized. 5. This paper studies the data communication between PS and PL, introduces several main communication methods, and expounds its characteristics and advantages and disadvantages. And for echo acquisition module, the specific implementation method. 6. 6. A file system for image storage is designed. File system is implemented in C language in PS. It can provide simple commands such as writing files, reading files, deleting files and so on. The user can store and read the image directly through the upper computer interface control digital processing module, shield the concrete operation of the bottom FLASH, and improve the man-machine interaction ability of the system.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類(lèi)號(hào)】：TN957.52
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1 王勝,王新宇;LVDS技術(shù)及其在高速系統(tǒng)中的應(yīng)用[J];遙測(cè)遙控;2005年04期
相關(guān)碩士學(xué)位論文 前1條
1 譚高偉;雷達(dá)信號(hào)處理機(jī)高速大容量存儲(chǔ)系統(tǒng)設(shè)計(jì)實(shí)現(xiàn)[D];西安電子科技大學(xué);2014年
，本文編號(hào)：2280158
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