發(fā)布時(shí)間：2018-10-10 20:25

【摘要】：在無線通信領(lǐng)域中,正交頻分復(fù)用(Orthogonal Frequency Division Multiplexing, OFDM)技術(shù)由于其抗衰能力強(qiáng)、抗符號(hào)間干擾能力強(qiáng)、高頻譜利用率等優(yōu)點(diǎn)而得到廣泛的應(yīng)用。但是OFDM技術(shù)也存在著固有的局限性,主要表現(xiàn)在OFDM系統(tǒng)對(duì)同步誤差十分敏感。沒有準(zhǔn)確的同步算法,就無法保障可靠的數(shù)據(jù)傳輸,同步技術(shù)直接關(guān)系到通信系統(tǒng)的性能,而OFDM定時(shí)同步又是其它所有同步的前提。所以如何實(shí)現(xiàn)定時(shí)同步也早已成為該領(lǐng)域中的重要問題。隨著數(shù)據(jù)的存儲(chǔ)、傳輸、處理的工作量越來越大,如何提高定時(shí)同步算法的運(yùn)行速度正逐漸成為當(dāng)今無線通信系統(tǒng)中的熱點(diǎn)問題之一。圖形處理器(Graphics Processing Unit, GPU)的快速發(fā)展為這個(gè)問題帶來了一個(gè)新的解決方案。由于GPU的計(jì)算能力以及它的存儲(chǔ)器帶寬已經(jīng)達(dá)到了同時(shí)期中央處理器(Central Processing Unit, CPU)的百倍,甚至更多,因此,GPU為高性能計(jì)算提供了一個(gè)高效的平臺(tái)。但是由于GPU硬件結(jié)構(gòu)的限制,編程人員很難有效地利用GPU的資源進(jìn)行通用計(jì)算,而英偉達(dá)(NVIDIA)公司推出的統(tǒng)一計(jì)算設(shè)備架構(gòu)(Compute Unified Device Architecture, CUDA)則改變了這一現(xiàn)狀。CUDA可以利用GPU強(qiáng)大的計(jì)算能力進(jìn)行通用計(jì)算,并且以C語言為基礎(chǔ),使編程人員能夠非常容易地利用它在GPU上進(jìn)行程序的開發(fā)。本文探討了利用CUDA架構(gòu)如何實(shí)現(xiàn)定時(shí)同步樣算法的并行化,并提高該算法的運(yùn)行速度。主要工作包括：(1)在CPU上實(shí)現(xiàn)了基于循環(huán)前綴的定時(shí)同步串行算法。(2)將串行算法中可以并行的部分進(jìn)行歸納及改寫,然后在GPU上執(zhí)行,實(shí)現(xiàn)對(duì)算法的并行化。(3)利用Matlab編寫定時(shí)同步程序,對(duì)串行算法和并行算法的仿真結(jié)果進(jìn)行正確性驗(yàn)證,并將串行算法、并行算法執(zhí)行時(shí)所耗的時(shí)間進(jìn)行對(duì)比實(shí)驗(yàn)。結(jié)果表明,基于GPU的并行算法所消耗的時(shí)間要遠(yuǎn)遠(yuǎn)低于基于CPU的串行算法。(4)最后,根據(jù)結(jié)果,指出在GPU上實(shí)現(xiàn)并行計(jì)算的瓶頸,并給出一些對(duì)應(yīng)的優(yōu)化策略。
[Abstract]:In the field of wireless communication, orthogonal Frequency Division Multiplexing (Orthogonal Frequency Division Multiplexing, OFDM) technology has been widely used because of its strong anti-fading ability, strong anti-symbol interference ability, high spectral efficiency and so on. However, OFDM technology also has inherent limitations, mainly because OFDM system is sensitive to synchronization error. Without accurate synchronization algorithm, reliable data transmission can not be guaranteed. Synchronization technology is directly related to the performance of communication system, and OFDM timing synchronization is the premise of all other synchronization. So how to realize timing synchronization has already become an important problem in this field. With the increasing workload of data storage, transmission and processing, how to improve the speed of timing synchronization algorithm is becoming one of the hot issues in wireless communication systems. The rapid development of graphics processor (Graphics Processing Unit, GPU) has brought a new solution to this problem. Because the computing power and memory bandwidth of GPU has reached 100 times or even more than that of CPU (Central Processing Unit, CPU) in the same period, GPU provides an efficient platform for high performance computing. However, due to the limitation of GPU hardware structure, it is very difficult for programmers to utilize the resources of GPU effectively for general computation. Nvidia (NVIDIA) 's unified computing device architecture, (Compute Unified Device Architecture, CUDA), has changed the situation. CUDA can use GPU's powerful computing power to do general computing, and it is based on C language. Make it very easy for programmers to develop programs on GPU. This paper discusses how to realize the parallelization of timing synchronization algorithm using CUDA architecture and improve the speed of the algorithm. The main works are as follows: (1) the timing synchronous serial algorithm based on cyclic prefix is implemented on CPU. (2) the parallel parts of the serial algorithm are summarized and rewritten, and then executed on GPU. (3) using Matlab to write timing synchronization program to verify the correctness of the simulation results of serial algorithm and parallel algorithm, and compare the time of serial algorithm and parallel algorithm execution. The results show that the parallel algorithm based on GPU consumes much less time than the serial algorithm based on CPU. (4) finally, according to the results, the bottleneck of parallel computing on GPU is pointed out, and some corresponding optimization strategies are given.
【學(xué)位授予單位】：東北大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TN929.53

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