發(fā)布時(shí)間：2018-09-11 09:46

【摘要】：在通信過(guò)程中常使用循環(huán)冗余編碼(CRC)進(jìn)行差錯(cuò)控制.CRC校驗(yàn)可以通過(guò)軟件和硬件兩種方法實(shí)現(xiàn),在基于硬件的方法中,可用線性反饋移位寄存器(LFSR)實(shí)現(xiàn)CRC的校驗(yàn)計(jì)算.以LFSR電路為基礎(chǔ),用FPGA實(shí)現(xiàn)了CRC校驗(yàn)碼的串行和并行兩種算法,利用QuartusⅡ軟件設(shè)計(jì)了串行和并行算法的Verilog HDL代碼.Modelsim軟件的仿真驗(yàn)證結(jié)果表明:基于LFSR設(shè)計(jì)的CRC串行算法具有實(shí)現(xiàn)原理簡(jiǎn)單,耗時(shí)較長(zhǎng)的特點(diǎn);并行算法雖然過(guò)程復(fù)雜繁瑣,但效率高、耗時(shí)短.
[Abstract]:In the process of communication, the cyclic redundant coding (CRC) is often used for error control. CRC check can be realized by both software and hardware. In the hardware-based method, the linear feedback shift register (LFSR) can be used to realize the verification calculation of CRC. Based on LFSR circuit, the serial and parallel algorithms of CRC check code are implemented with FPGA. The simulation results show that the CRC serial algorithm based on LFSR has the characteristics of simple realization principle and long time consuming, while the parallel algorithm is complicated, and the simulation results show that the CRC serial algorithm based on LFSR has the characteristics of simple realization principle, long time consuming, and complex parallel algorithm, and the simulation results show that the parallel algorithm has the advantages of simple implementation principle and long time consuming. But the efficiency is high and the time is short.
【作者單位】： 蘭州交通大學(xué)光電技術(shù)與智能控制教育部重點(diǎn)實(shí)驗(yàn)室;
【分類(lèi)號(hào)】：TN911.2;TN791

【參考文獻(xiàn)】

相關(guān)期刊論文 前3條

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本文編號(hào)：2236341