【摘要】：在航空電子系統(tǒng)中,各個(gè)功能模塊之間要傳輸海量的數(shù)據(jù)信息,要求總線帶寬具有萬兆級(jí)。同時(shí),當(dāng)今科技的發(fā)展為航空電子系統(tǒng)進(jìn)行高速數(shù)據(jù)通信提供了多種選擇,包括萬兆以太網(wǎng)和光纖通道技術(shù)在內(nèi)的COTS網(wǎng)絡(luò)技術(shù),可以用作航空電子總線技術(shù)的支持和補(bǔ)充。萬兆級(jí)網(wǎng)絡(luò)綜合測(cè)試系統(tǒng)主要對(duì)航空電子系統(tǒng)網(wǎng)絡(luò)的各項(xiàng)性能進(jìn)行測(cè)試與調(diào)試。本文進(jìn)行了萬兆級(jí)網(wǎng)絡(luò)綜合測(cè)試系統(tǒng)兼容接口的設(shè)計(jì),其目標(biāo)是實(shí)現(xiàn)萬兆以太網(wǎng)和光纖通道網(wǎng)絡(luò)在物理層接口處的兼容。對(duì)比分析了萬兆以太網(wǎng)和光纖通道網(wǎng)絡(luò)物理層規(guī)范標(biāo)準(zhǔn),說明了接口兼容設(shè)計(jì)的可行性。兼容接口設(shè)計(jì)的內(nèi)容包括硬件接口電路和兼容接口邏輯功能模塊,硬件接口電路設(shè)計(jì)能夠支持1/10GE和1/2/4/8GFC的數(shù)據(jù)傳輸。對(duì)比分析了X2和SFP+光收發(fā)器的基本性能和應(yīng)用特點(diǎn),選擇了同時(shí)服從萬兆以太網(wǎng)和光纖通道網(wǎng)絡(luò)協(xié)議標(biāo)準(zhǔn)的SFP+光收發(fā)器。根據(jù)兼容性設(shè)計(jì)要求,選擇了單通道和四通道的時(shí)鐘數(shù)據(jù)恢復(fù)器。本文完成了硬件接口電路原理圖和PCB設(shè)計(jì)。兼容接口邏輯功能模塊包括兼容接口邏輯處理模塊、XGMII改進(jìn)接口、時(shí)鐘管理單元和數(shù)據(jù)管理單元,能夠?qū)崿F(xiàn)萬兆以太網(wǎng)和光纖通道物理層數(shù)據(jù)的處理。兼容接口邏輯處理模塊改進(jìn)了GTX IPCore,采用了GTX的SerDes功能模塊,主要實(shí)現(xiàn)兼容接口的邏輯功能。XGMII改進(jìn)接口能夠支持不同速率以太網(wǎng)和光纖通道網(wǎng)絡(luò)的數(shù)據(jù)傳輸,時(shí)鐘管理單元負(fù)責(zé)時(shí)鐘同步和提供參考時(shí)鐘,數(shù)據(jù)管理單元負(fù)責(zé)控制信號(hào)的配置管理。本文完成了兼容接口的功能驗(yàn)證,包括在開發(fā)板上對(duì)接口的兼容性進(jìn)行驗(yàn)證和在Modelsim上對(duì)兼容性模塊進(jìn)行功能仿真。改進(jìn)的GTX在開發(fā)板上實(shí)現(xiàn)了對(duì)不同速率網(wǎng)絡(luò)的支持。仿真驗(yàn)證的邏輯功能模塊包括SerDes模塊、編解碼模塊、CRC校驗(yàn)?zāi)K、擾碼解擾碼模塊、FC端口狀態(tài)機(jī)模塊、XGMII改進(jìn)接口以及10G MAC模塊。接口兼容性功能驗(yàn)證說明了兼容接口設(shè)計(jì)的正確性。本文的兼容接口設(shè)計(jì)初步實(shí)現(xiàn)了萬兆以太網(wǎng)和光纖通道網(wǎng)絡(luò)物理層的融合。
[Abstract]:In avionics system, there is a huge amount of data information to be transmitted between each functional module, which requires a bus bandwidth of ten thousand megabytes. At the same time, the development of science and technology provides a variety of options for high-speed data communication in avionics systems. The COTS network technology, including Gigabit Ethernet and fiber channel technology, can be used as the support and supplement of avionics bus technology. The multimegabit network integrated test system mainly tests and debugs the performance of avionics system network. In this paper, the compatible interface of the multi-megabyte network test system is designed. The goal is to realize the compatibility between the Ethernet and the fiber channel network at the interface of the physical layer. This paper compares and analyzes the physical layer specification standards of ten thousand megabit Ethernet and fiber channel network, and explains the feasibility of interface compatibility design. The content of compatible interface design includes hardware interface circuit and compatible interface logic module. Hardware interface circuit design can support data transmission between 1/10GE and 1/2/4/8GFC. The basic performance and application characteristics of X2 and SFP optical transceivers are compared and analyzed. The SFP optical transceivers serving both slave Ethernet and fiber channel network protocol standards are selected. According to the requirements of compatibility design, single channel and four channel clock data restorer are selected. In this paper, the hardware interface circuit schematic diagram and PCB design are completed. The compatible interface logic module includes compatible interface logic processing module XGMII improved interface, clock management unit and data management unit, which can realize the data processing in the physical layer of Gigabit Ethernet and optical fiber channel. The compatible interface logic processing module improves the GTX IP Core, and adopts the SerDes function module of GTX. It mainly realizes the compatible interface logic function. XGMII improved interface can support the data transmission of Ethernet and fiber channel network with different rates. The clock management unit is responsible for clock synchronization and reference clock, and the data management unit is responsible for the configuration management of the control signal. This paper completes the functional verification of the compatible interface, including verification of the compatibility of the interface on the development board and functional simulation of the compatibility module on the Modelsim. The improved GTX supports different rate networks on the development board. The logic function modules include SerDes module, encoding and decoding module, scrambling code unscrambling module, FC port state machine module and 10G MAC module. The verification of interface compatibility function shows the correctness of compatible interface design. The compatible interface design of this paper primarily realizes the fusion of the physical layer of the Ethernet and the fiber channel network.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：V243;TN915.06

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本文編號(hào)：2196313