超聲相控陣收發(fā)電路設(shè)計與關(guān)鍵技術(shù)研究
發(fā)布時間：2018-08-03 16:39
【摘要】：隨著現(xiàn)代工業(yè)的迅速發(fā)展，各類設(shè)備、材料日趨復(fù)雜，所要面對的工作環(huán)境等也發(fā)生了變化，對無損檢測提出了許多新的要求。超聲相控陣以其獨有的特點和優(yōu)勢開始擔負起更多地檢測任務(wù)，逐漸在無損檢測領(lǐng)域占據(jù)重要地位，成為了研究的熱點，這是無損檢測發(fā)展的一種必然趨勢。 本文完成了超聲相控陣設(shè)備的硬件設(shè)計，解決了高頻收發(fā)電路設(shè)計中的關(guān)鍵問題，提高了相控陣延時控制的精度，所完成的原理樣機在檢測實驗中取得了成功。研究內(nèi)容主要包括以下幾個方面： 學(xué)習(xí)了聲學(xué)、超聲探傷和相控陣技術(shù)的原理知識，研究了超聲收發(fā)電路設(shè)計方式、高速電路設(shè)計原則和微弱信號提取方法，確定了以上位計算機、數(shù)字控制電路和收發(fā)電路三部分組成的研制方案。 研究了高速數(shù)字邏輯電路設(shè)計方法，設(shè)計并完成了基于單片低成本FPGA的高精度相控陣控制電路。根據(jù)所使用FPGA的自身特性，提出了基于鎖相環(huán)技術(shù)的延時控制電路設(shè)計方法。該方法在兼顧集成度的同時，利用50MHz的時鐘輸入，實現(xiàn)了1ns的延時精度。為實現(xiàn)系統(tǒng)的智能化、高效化，還設(shè)計了以NIOS II處理器為核心的嵌入式處理系統(tǒng)，使設(shè)備工作參數(shù)可被實時重配置。 設(shè)計完成了16路相控陣收發(fā)電路，克服了高壓、高頻信號所帶來的不利影響，實現(xiàn)了對mv級缺陷回波信號的提取。經(jīng)過多次反復(fù)選型、實驗和改進，確定了以ISL55110為驅(qū)動的超聲發(fā)射電路，解決了發(fā)射電路對高頻、高壓的需求。二極管橋路被引入到限幅電路中，解決了高頻大信號的限幅問題，，又保證微弱信號得到良好保存。同時，為了與數(shù)字控制電路相適應(yīng)，收發(fā)電路部分的線延時通過布局、線補償、接口線設(shè)計和屏蔽等方式被控制到最小，使高精度延時控制得以實現(xiàn)。 完成了具有高精度延時控制能力的16路超聲相控陣原理樣機，在實際檢測實驗中成功檢測出缺陷，表現(xiàn)良好。
[Abstract]:With the rapid development of modern industry, all kinds of equipments and materials are becoming more and more complex, and the working environment has also changed. Therefore, many new requirements have been put forward for NDT. With its unique characteristics and advantages, ultrasonic phased array has begun to take on more testing tasks, and gradually occupies an important position in the field of nondestructive testing. It has become a hot spot of research, which is an inevitable trend in the development of nondestructive testing (NDT). In this paper, the hardware design of ultrasonic phased array equipment is completed, the key problems in the design of high frequency transceiver circuit are solved, and the precision of phased array delay control is improved. The principle prototype has been successfully tested and tested. The main contents of this paper are as follows: we have studied the principles of acoustics, ultrasonic flaw detection and phased array technology, studied the design method of ultrasonic transceiver circuit, the design principle of high-speed circuit and the method of weak signal extraction. The development scheme of the above three parts of computer, digital control circuit and transceiver circuit is determined. The design method of high speed digital logic circuit is studied, and the high precision phased array control circuit based on single chip and low cost FPGA is designed and completed. According to the characteristics of FPGA used, the design method of delay control circuit based on PLL technology is proposed. In this method, the delay precision of 1ns is realized by using the clock input of 50MHz while the integration level is taken into account. In order to realize the intelligentization and high efficiency of the system, an embedded processing system based on NIOS II processor is designed, so that the working parameters of the equipment can be reconfigured in real time. A 16-channel phased array transceiver circuit is designed to overcome the adverse effects of high voltage and high frequency signals and to extract the echo signals of MV level defects. After repeated selection, experiment and improvement, the ultrasonic emission circuit driven by ISL55110 is determined, and the demand for high frequency and high voltage is solved. The diode bridge is introduced into the limiting circuit, which solves the limiting problem of high frequency large signal and ensures that the weak signal is well preserved. At the same time, in order to adapt to the digital control circuit, the line delay of the transceiver circuit is controlled to the minimum by layout, line compensation, interface line design and shielding, so that the high-precision delay control can be realized. A 16-channel ultrasonic phased array prototype with high precision delay control capability is completed. The defect is successfully detected in the actual testing experiment and the performance is good.
【學(xué)位授予單位】：南京航空航天大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：TN859
本文編號：2162346
[Abstract]:With the rapid development of modern industry, all kinds of equipments and materials are becoming more and more complex, and the working environment has also changed. Therefore, many new requirements have been put forward for NDT. With its unique characteristics and advantages, ultrasonic phased array has begun to take on more testing tasks, and gradually occupies an important position in the field of nondestructive testing. It has become a hot spot of research, which is an inevitable trend in the development of nondestructive testing (NDT). In this paper, the hardware design of ultrasonic phased array equipment is completed, the key problems in the design of high frequency transceiver circuit are solved, and the precision of phased array delay control is improved. The principle prototype has been successfully tested and tested. The main contents of this paper are as follows: we have studied the principles of acoustics, ultrasonic flaw detection and phased array technology, studied the design method of ultrasonic transceiver circuit, the design principle of high-speed circuit and the method of weak signal extraction. The development scheme of the above three parts of computer, digital control circuit and transceiver circuit is determined. The design method of high speed digital logic circuit is studied, and the high precision phased array control circuit based on single chip and low cost FPGA is designed and completed. According to the characteristics of FPGA used, the design method of delay control circuit based on PLL technology is proposed. In this method, the delay precision of 1ns is realized by using the clock input of 50MHz while the integration level is taken into account. In order to realize the intelligentization and high efficiency of the system, an embedded processing system based on NIOS II processor is designed, so that the working parameters of the equipment can be reconfigured in real time. A 16-channel phased array transceiver circuit is designed to overcome the adverse effects of high voltage and high frequency signals and to extract the echo signals of MV level defects. After repeated selection, experiment and improvement, the ultrasonic emission circuit driven by ISL55110 is determined, and the demand for high frequency and high voltage is solved. The diode bridge is introduced into the limiting circuit, which solves the limiting problem of high frequency large signal and ensures that the weak signal is well preserved. At the same time, in order to adapt to the digital control circuit, the line delay of the transceiver circuit is controlled to the minimum by layout, line compensation, interface line design and shielding, so that the high-precision delay control can be realized. A 16-channel ultrasonic phased array prototype with high precision delay control capability is completed. The defect is successfully detected in the actual testing experiment and the performance is good.
【學(xué)位授予單位】：南京航空航天大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：TN859
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