本文選題：步進(jìn)頻率 + 雷達(dá)�。� 參考：《西安電子科技大學(xué)》2015年碩士論文

【摘要】：步進(jìn)頻率連續(xù)波雷達(dá)采用窄帶單頻率步進(jìn)的連續(xù)波來(lái)實(shí)現(xiàn)超寬帶,具有系統(tǒng)結(jié)構(gòu)和信號(hào)處理簡(jiǎn)單、發(fā)射功率低、瞬時(shí)帶寬窄、等效工作帶寬寬、測(cè)距和測(cè)速精度高等特點(diǎn),廣泛應(yīng)用于探地、戰(zhàn)場(chǎng)監(jiān)視、微變形監(jiān)測(cè)、生命探測(cè)、車(chē)輛防撞等領(lǐng)域。本文基于某雷達(dá)工程項(xiàng)目,詳細(xì)研究某步進(jìn)頻率連續(xù)波雷達(dá)信號(hào)處理的硬件設(shè)計(jì)以及FPGA主要模塊的軟件設(shè)計(jì)。首先提出了基于“DSP+FPGA”雙核架構(gòu)的雷達(dá)信號(hào)處理機(jī)的設(shè)計(jì)架構(gòu),設(shè)計(jì)并實(shí)現(xiàn)了信號(hào)處理機(jī)硬件,其中包括FPGA、DSP、復(fù)位控制、時(shí)鐘管理、電源管理、ADC、存儲(chǔ)器、通信接口等模塊電路。其次,設(shè)計(jì)了FPGA主要模塊的軟件,包括時(shí)鐘與復(fù)位管理、數(shù)字下變頻、加窗FFT、鏈路口通信、異步串口通信和以太網(wǎng)通信等模塊的軟件。最后,對(duì)信號(hào)處理機(jī)的硬件和軟件進(jìn)行了測(cè)試,給出了測(cè)試方法和測(cè)試結(jié)果,測(cè)試結(jié)果表明,雷達(dá)信號(hào)處理機(jī)硬件和軟件設(shè)計(jì)正確,滿(mǎn)足設(shè)計(jì)要求。
[Abstract]:Step frequency continuous wave radar uses narrow band single frequency step continuous wave to realize UWB. It has the characteristics of simple system structure and signal processing, low transmitting power, narrow instantaneous band width, wide equivalent working bandwidth, high ranging and measuring accuracy, etc. Widely used in earth exploration, battlefield surveillance, micro deformation monitoring, life detection, vehicle collision prevention and other fields. Based on a radar project, the hardware design of a step frequency CW radar signal processing and the software design of the main modules of FPGA are studied in detail in this paper. Firstly, the design architecture of radar signal processor based on "DSP FPGA" dual-core architecture is presented, and the hardware of signal processor is designed and implemented, including FPGA DSPR, reset control, clock management, power management, ADC, memory, communication interface and so on. Secondly, the software of the main modules of FPGA is designed, including clock and reset management, digital downconversion, windowed FFTT, link intersection communication, asynchronous serial port communication and Ethernet communication. Finally, the hardware and software of the signal processor are tested, and the test method and test results are given. The test results show that the design of the hardware and software of the radar signal processor is correct and meets the design requirements.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類(lèi)號(hào)】：TN957.51

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