發(fā)布時(shí)間：2018-07-11 16:36

  本文選題：三網(wǎng)融合 + 模塊設(shè)計(jì)��； 參考：《西安電子科技大學(xué)》2014年碩士論文

【摘要】：模擬技術(shù)到數(shù)字技術(shù)的快速轉(zhuǎn)變深刻影響著人們的生活,它使得語(yǔ)音、圖像和數(shù)據(jù)等都以二進(jìn)制的形式存儲(chǔ)和傳輸。三網(wǎng)融合便在這種技術(shù)支撐下應(yīng)運(yùn)而生。雖然信息的形態(tài)是多種多樣的,傳輸?shù)妮d體也是千變?nèi)f化的,但是三網(wǎng)融合卻使得在這些不同的載體的組合上可以傳輸各種形式的信息,這也正是三網(wǎng)融合的本質(zhì)。在進(jìn)行三網(wǎng)融合信息處理過(guò)程中不可避免要用到基帶信號(hào)的處理,也即對(duì)從信源發(fā)出的沒(méi)有經(jīng)過(guò)頻譜搬移和變換的原始電信號(hào)的處理�；鶐Ц咚偬幚碛布宓脑O(shè)計(jì)和實(shí)現(xiàn)不僅對(duì)基帶信號(hào)本身的處理有著關(guān)鍵作用,也同樣能夠影響到整個(gè)控制系統(tǒng)。在這其中也不可避免的涉及到許多高速信號(hào)的處理問(wèn)題。故此本文又特意介紹了一些高速數(shù)據(jù)的信號(hào)完整性問(wèn)題并對(duì)此進(jìn)行了相應(yīng)的仿真。整個(gè)龐大的三網(wǎng)融合驗(yàn)證平臺(tái)系統(tǒng)是由基帶處理板、雙向射頻版以及調(diào)諧板、控制板和解碼板等構(gòu)成。但是本文只重點(diǎn)介紹了其中的基帶高速處理硬件平臺(tái)的總體設(shè)計(jì)。其中包含了系統(tǒng)的軟硬件設(shè)計(jì),并且著重介紹了電源部分的處理;其次完成了PCB的板級(jí)設(shè)計(jì),元器件的布局以及PCB的布線(xiàn),以及高速信號(hào)的處理和調(diào)試等內(nèi)容。本文完成的工作主要體現(xiàn)在以下幾個(gè)方面:1、分析三網(wǎng)融合系統(tǒng)的結(jié)構(gòu)以及各個(gè)模塊的功能定義,了解基帶高速處理板所要達(dá)到的性能,做初步的設(shè)計(jì)構(gòu)思。2、根據(jù)以上的分析提出了以TI公司的基于達(dá)芬奇技術(shù)的數(shù)字媒體處理芯片TMS320DM8168作為ARM端的主芯片,以Altera公司的5SGSMD5K3F40C4N為接收其他板傳輸過(guò)來(lái)的信號(hào)的處理芯片的設(shè)計(jì)方案。與此同時(shí),設(shè)計(jì)出基帶高速處理板的整體架構(gòu)以及外圍結(jié)構(gòu)。3、利用Cadence Spb16.3軟件完成了該板子的原理圖設(shè)計(jì)和PCB走線(xiàn)。在設(shè)計(jì)過(guò)程中采用了模塊化設(shè)計(jì)方法,從電源部分、時(shí)鐘部分、配置部分和外設(shè)部分等進(jìn)行設(shè)計(jì)。4、在PCB布局完之后著重考慮了部分高速信號(hào)線(xiàn)的信號(hào)完整性問(wèn)題,以得到最佳的信號(hào)傳輸效果。5、隨后又焊接了完整的PCB板,對(duì)其電源部分做了詳細(xì)的調(diào)試說(shuō)明,最后完成軟硬件環(huán)境的搭建和聯(lián)合調(diào)試。
[Abstract]:The rapid transformation from analog technology to digital technology has a profound impact on people's lives. It makes voice, image and data stored and transmitted in binary form. Three networks fusion in this kind of technology support came into being. Although the form of information is varied and the carrier of transmission is changeable, the combination of three networks makes it possible to transmit various forms of information in the combination of these different carriers, which is the essence of the triple network convergence. The processing of baseband signal is inevitable in the process of tri-network fusion information processing, that is, the processing of the original electrical signal without spectrum shift and transformation sent from the source. The design and implementation of the baseband high-speed processing hardware board not only plays a key role in the baseband signal processing itself, but also affects the whole control system. It is inevitable to deal with many problems of high-speed signal processing. Therefore, the signal integrity of some high-speed data is introduced and simulated. The whole system is composed of baseband processing board, bidirectional radio frequency plate, tuning board, control board and decoding board. But this paper only introduces the overall design of the baseband high-speed processing hardware platform. It includes the hardware and software design of the system, and introduces the processing of the power supply part. Secondly, the PCB board level design, the layout of components and PCB wiring, as well as the high-speed signal processing and debugging are completed. The work accomplished in this paper is mainly reflected in the following several aspects: 1, analyzes the structure of the three-network fusion system and the functional definitions of each module, and understands the performance of the baseband high-speed processing board. Based on the above analysis, a digital media processing chip TMS320DM8168 of TI Company based on da Vinci technology is proposed as the main chip of arm. Using 5SGSMD5K3F40C4N of Altera Company as the design of processing chip to receive the signal transmitted from other boards. At the same time, the whole architecture and peripheral structure of the baseband high-speed processing board are designed. The schematic design and PCB wiring of the board are completed by Cadence Spb16.3 software. In the process of design, the modular design method is adopted, which includes power supply, clock, configuration and peripheral. After the PCB layout is finished, the signal integrity of some high-speed signal lines is considered emphatically. In order to get the best signal transmission effect. 5, the PCB board is welded and the power supply part is debugged in detail. Finally, the hardware and software environment is built and the joint debugging is completed.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類(lèi)號(hào)】：TN948.3;TN911.7

【參考文獻(xiàn)】

相關(guān)碩士學(xué)位論文 前1條

1 楊玲;基于電路級(jí)的低功耗關(guān)鍵技術(shù)研究[D];上海交通大學(xué);2010年

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本文編號(hào)：2115886