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一種多模式Turbo譯碼器IP核的設(shè)計(jì)與實(shí)現(xiàn)

發(fā)布時(shí)間:2018-07-04 16:01

  本文選題:Turbo譯碼器 + Lookup-Log-MAP算法 ; 參考:《國(guó)防科學(xué)技術(shù)大學(xué)》2014年碩士論文


【摘要】:自Turbo碼誕生以來(lái),就以接近香農(nóng)極限的優(yōu)異性能得到了通信領(lǐng)域的廣泛關(guān)注和深入研究。隨著長(zhǎng)期演進(jìn)項(xiàng)目的繼續(xù)推進(jìn)以及4G時(shí)代的到來(lái),對(duì)信息傳輸?shù)目煽啃院陀行蕴岢龈叩囊?作為無(wú)線通信信道編碼標(biāo)準(zhǔn)之一的Turbo碼更成為研究的熱點(diǎn)。本文在深入研究Turbo碼理論的基礎(chǔ)上,設(shè)計(jì)了一款旨在提高吞吐率和譯碼效率的多模式Turbo譯碼器IP核。本文采用自頂向下的設(shè)計(jì)方法,完成了Turbo譯碼器IP核的設(shè)計(jì)和驗(yàn)證工作,然后進(jìn)行了性能分析。論文的主要研究?jī)?nèi)容有:1、基于MATLAB的平臺(tái)對(duì)Lookup-Log-MAP算法進(jìn)行性能仿真,確定該算法為本設(shè)計(jì)中采用的譯碼算法。2、全面設(shè)計(jì)和實(shí)現(xiàn)了支持3G通信協(xié)議的多模式Turbo譯碼器IP核。該IP核采用標(biāo)準(zhǔn)化的接口設(shè)計(jì),包括基于AXI協(xié)議的數(shù)據(jù)接口設(shè)計(jì),具有更大的帶寬、更高的靈活性;基于APB協(xié)議的配置總線接口設(shè)計(jì),具有更高的穩(wěn)定性和有效性。3、為提高譯碼效率、減少延時(shí),該IP核采用四個(gè)SISO模塊并行譯碼的結(jié)構(gòu);每個(gè)SISO譯碼模塊采用改進(jìn)的滑窗算法調(diào)度,支持可配置個(gè)數(shù)范圍內(nèi)的任意情況,提高了設(shè)備的可擴(kuò)展性;通過(guò)使用兩個(gè)單端口存儲(chǔ)器進(jìn)行“乒乓”操作的方式存儲(chǔ)前向量度值,減少了控制邏輯,降低了硬件實(shí)現(xiàn)復(fù)雜度,存儲(chǔ)器容量相對(duì)于未采用滑窗算法時(shí)減小了3/5;設(shè)計(jì)了基于外信息統(tǒng)計(jì)特性的提前停止譯碼準(zhǔn)則,在不降低譯碼性能的基礎(chǔ)上有效減少譯碼延時(shí)。4、該IP核在存儲(chǔ)模塊和譯碼模塊間增加緩沖模塊的設(shè)計(jì),解決了存儲(chǔ)單元向譯碼單元供數(shù)不足的問(wèn)題,防止訪問(wèn)沖突的發(fā)生。5、經(jīng)過(guò)全面的驗(yàn)證和測(cè)試,該IP核功能正確,在65nm CMOS工藝下綜合得出其實(shí)際工作頻率可達(dá)到400MHz,誤碼率和譯碼速率均達(dá)到了多模式Turbo譯碼器IP核的設(shè)計(jì)需求。
[Abstract]:Since Turbo code was born, it has received extensive attention and in-depth research in the field of communication for its excellent performance near Shannon limit. With the development of the long-term evolution project and the arrival of 4G era, the reliability and efficiency of information transmission are required higher. As one of the wireless communication channel coding standards, Turbo code has become a hot research topic. Based on the research of Turbo code theory, a multi-mode Turbo decoder IP core is designed to improve throughput and decoding efficiency. In this paper, the design and verification of the IP core of Turbo decoder are completed by using the top-down design method, and then the performance analysis is carried out. The main research contents of this paper are as follows: 1. The performance simulation of Lookup-Log-MAP algorithm based on MATLAB is carried out. It is determined that this algorithm is the decoding algorithm used in this design. The IP core of multi-mode Turbo decoder supporting 3G communication protocol is designed and implemented in an all-round way. The IP core adopts standardized interface design, including data interface design based on AXI protocol, which has higher bandwidth and flexibility, and configuration bus interface design based on APB protocol. In order to improve the decoding efficiency and reduce the delay, the IP core adopts four SISO modules to decode in parallel, each SISO decoding module uses an improved sliding window algorithm. It supports any situation in the range of configurable number, improves the expansibility of the device, stores the forward metric value by using two single-port memory to perform "ping-pong" operation, reduces the control logic and reduces the complexity of hardware implementation. The memory capacity is reduced by 3 / 5 compared with that without the sliding window algorithm, and an early stop decoding criterion based on the statistical characteristics of external information is designed. On the basis of not reducing the decoding performance, the decoding delay. 4 is effectively reduced. The IP core adds buffer modules between the storage module and the decoding module, which solves the problem of the insufficient supply of memory cells to the decoding units. After full verification and test, the IP core has the correct function. The actual working frequency of the IP core can reach 400 MHz in 65nm CMOS technology. The bit error rate and decoding rate are both up to the design requirements of the IP core of the multi-mode turbo decoder.
【學(xué)位授予單位】:國(guó)防科學(xué)技術(shù)大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2014
【分類(lèi)號(hào)】:TN911.22

【參考文獻(xiàn)】

相關(guān)碩士學(xué)位論文 前1條

1 郗莉;LTE系統(tǒng)Turbo高速譯碼算法研究[D];西安電子科技大學(xué);2010年



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