本文選題：二維 + 哈達(dá)瑪變換��； 參考：《西安電子科技大學(xué)》2014年碩士論文

【摘要】：數(shù)學(xué)變換作為數(shù)字信號(hào)處理的理論基礎(chǔ),是影響系統(tǒng)性能的決定因素,并且隨著信息量與信號(hào)維數(shù)的增加,變換也更加耗時(shí),這就需要更簡(jiǎn)便的變換算法與更合理的系統(tǒng)架構(gòu)來(lái)對(duì)變換進(jìn)行優(yōu)化。哈達(dá)瑪變換作為一種結(jié)構(gòu)簡(jiǎn)便的非正弦類正交變換,擁有實(shí)數(shù)變換,變換只涉及到加、減法,反變換簡(jiǎn)單,存在快速算法且易于硬件實(shí)現(xiàn)等特點(diǎn),這讓哈達(dá)瑪變換在數(shù)字信號(hào)處理領(lǐng)域有著廣闊的前景。此外,迫于空間、計(jì)算耗時(shí)等限制,哈達(dá)瑪變換基于硬件的應(yīng)用并不盡如人意。對(duì)此,FPGA平臺(tái)具有靈活性高、并行處理等優(yōu)點(diǎn),基于FPGA嵌入式硬件實(shí)現(xiàn)成為突破有關(guān)限制的選擇方式,所以本論文要研究基于FPGA的哈達(dá)瑪?shù)膶?shí)現(xiàn),而目前對(duì)于哈達(dá)瑪變換FPGA實(shí)現(xiàn)的相關(guān)研究多集中于一維與低點(diǎn)數(shù)。在現(xiàn)實(shí)中,圖像是以二維信號(hào)的形式存在的,對(duì)圖像進(jìn)行處理的前提是需要將二維圖像信號(hào)進(jìn)行變換處理�；谝陨媳尘凹袄碚�,本文著眼于哈達(dá)瑪變換中傳統(tǒng)的行列互換法對(duì)二維高點(diǎn)數(shù)的FPGA實(shí)現(xiàn),以及新穎的二維塊分法在FPGA上實(shí)現(xiàn),并推廣到高點(diǎn)數(shù)應(yīng)用的可行性的研究,與二維哈達(dá)瑪變換在圖像處理中的相關(guān)應(yīng)用。首先,論文介紹了沃爾什-哈達(dá)瑪?shù)难芯勘尘芭c意義,對(duì)其現(xiàn)狀與未來(lái)發(fā)展進(jìn)行了論述。接著介紹了使用FPGA平臺(tái)進(jìn)行哈達(dá)瑪變換的優(yōu)點(diǎn)與關(guān)鍵技術(shù)。其次,論文介紹了哈達(dá)瑪變換相關(guān)理論基礎(chǔ)。在一維變換矩陣形式的基礎(chǔ)上,通過(guò)將變換矩陣稀疏化推導(dǎo)了一維哈達(dá)瑪變換的快速算法。對(duì)于二維快速算法,本文介紹了基于行列互換法與塊分法兩種算法,其中行列互換法采用了將二維變換通過(guò)矩陣行列互換分解成兩次一維變換的方法實(shí)現(xiàn)了算法；塊分法采用了一種“分塊”方法,即通過(guò)對(duì)運(yùn)算矩陣不斷四等分的降維思想實(shí)現(xiàn)了算法。接著,論文開展了對(duì)基于這兩種快速算法的二維哈達(dá)瑪變換的FPGA設(shè)計(jì)的研究,分別通過(guò)基于Quartus Ⅱ與Modelsim的軟件平臺(tái)進(jìn)行了設(shè)計(jì)與仿真,并通過(guò)Matlab驗(yàn)證了結(jié)果的正確性。其中,行列互換法的設(shè)計(jì)實(shí)現(xiàn)了對(duì)256*256點(diǎn)數(shù)的輸入的處理,在實(shí)時(shí)性與誤差滿足了設(shè)計(jì)要求的前提下,將系統(tǒng)應(yīng)用到了相應(yīng)像素灰度圖片變換的研究中；塊分法對(duì)32*32點(diǎn)數(shù)的輸入進(jìn)行了仿真并驗(yàn)證。隨后,論文針對(duì)硬件資源與運(yùn)行速度兩個(gè)方面對(duì)基于兩種算法的設(shè)計(jì)進(jìn)行了對(duì)比,并對(duì)于塊分法的高點(diǎn)數(shù)推廣進(jìn)行了展望。研究結(jié)果表明,基于FPGA平臺(tái)的行列互換法的二維FHT實(shí)現(xiàn)了高點(diǎn)數(shù)的設(shè)計(jì)并滿足正確性與實(shí)時(shí)性：基于塊分法的設(shè)計(jì)實(shí)現(xiàn)了對(duì)中低點(diǎn)數(shù)輸入處理的目的,并對(duì)高點(diǎn)數(shù)應(yīng)用進(jìn)行了展望。
[Abstract]:As the theoretical basis of digital signal processing, mathematical transformation is the decisive factor that affects the performance of the system, and with the increase of information and signal dimension, the transformation becomes more time-consuming. This requires a simpler transformation algorithm and a more reasonable system architecture to optimize the transformation. As a non-sinusoidal orthonormal transform with simple structure, Hadamard transform has real number transformation, which only involves addition, subtraction, simple inverse transformation, fast algorithm and easy hardware implementation. This makes Hadamard transform have a broad prospect in the field of digital signal processing. In addition, due to the limitation of space and computation time, the application of Hadamard transform based on hardware is not satisfactory. The FPGA platform has the advantages of high flexibility, parallel processing and so on. The embedded hardware implementation based on FPGA has become the choice way to break through the limitation, so this paper will study the realization of Hadama based on FPGA. At present, most of the researches on FPGA implementation of Hadamard transform are focused on one dimension and low number. In reality, the image exists in the form of two-dimensional signal, and the premise of image processing is that the two-dimensional image signal needs to be transformed and processed. Based on the above background and theory, this paper focuses on the realization of 2D high point FPGA by the traditional column and column exchange method in Hadamard transform, and the feasibility study of the novel two-dimensional block partition method on FPGA, which is extended to the application of high number points. And 2D Hadamard transform in image processing. Firstly, the paper introduces the background and significance of Walsh-Hadamar's research, and discusses its present situation and future development. Then the advantages and key technologies of using FPGA platform for Hadamard transform are introduced. Secondly, the paper introduces the theoretical basis of Hadamard transform. Based on the form of one-dimensional transformation matrix, a fast algorithm of one-dimensional Hadamard transform is derived by thinning the transformation matrix. For the fast 2-D algorithm, this paper introduces two algorithms based on the row-column exchange method and the block division method, in which the row-column interchange method is implemented by decomposing the 2-D transformation into two one-dimensional transformation by matrix row-column interchange. The block partition method adopts a "block" method, that is, the algorithm is realized by reducing the dimension of the operation matrix. Then, the paper studies the FPGA design of 2D Hadamard transform based on these two fast algorithms, designs and simulates the software platform based on Quartus 鈪，

本文編號(hào)：2027914