本文選題：差分跳頻 + 現(xiàn)場(chǎng)可編程門陣列��； 參考：《大連海事大學(xué)》2014年碩士論文

【摘要】：差分跳頻技術(shù)(Differential Frequency Hopping, DFH)是一種集調(diào)制、解調(diào)和跳頻圖案為一體的新型跳頻技術(shù)。它從高速跳頻出發(fā),較好地解決了提高數(shù)據(jù)速率、抗多徑、抗跟蹤干擾的問題,由于差分跳頻圖案是基于有向圖的遍歷,差分跳頻序列還具有一定的糾檢錯(cuò)能力,進(jìn)一步提高了系統(tǒng)性能,這一切都使得差分跳頻技術(shù)代表了新一代短波抗干擾通信技術(shù)的發(fā)展方向。另一方面,由于現(xiàn)場(chǎng)可編程門陣列(Field Programmable Gate Array, FPGA)具有較高的靈活性、可重復(fù)利用性和開發(fā)周期短等優(yōu)點(diǎn),在通信系統(tǒng)設(shè)計(jì)開發(fā)中得到了廣泛的應(yīng)用。 本文從常規(guī)跳頻通信系統(tǒng)的基本原理與性能指標(biāo)出發(fā),重點(diǎn)研究了差分跳頻通信系統(tǒng)的關(guān)鍵技術(shù)。在此基礎(chǔ)上給出了差分跳頻通信系統(tǒng)的總體結(jié)構(gòu)和設(shè)計(jì)參數(shù)。整個(gè)系統(tǒng)包括了發(fā)送和接收兩部分。在發(fā)送系統(tǒng)中,主要包括信源模塊、串并轉(zhuǎn)換模塊、頻率轉(zhuǎn)移函數(shù)模塊、DDS模塊；在接收系統(tǒng)中,主要包括FFT變換模塊、頻率序列識(shí)別模塊、基于Viterbi算法的譯碼模塊、頻率轉(zhuǎn)移函數(shù)反變換模塊、并串轉(zhuǎn)換模塊。本文在Xilinx的ISE10.1開發(fā)環(huán)境下,采用Verilog硬件描述語言各個(gè)模塊進(jìn)行了詳細(xì)設(shè)計(jì),采用Synplify Pro9.6.2綜合工具對(duì)各個(gè)模塊進(jìn)行綜合,并給出了相應(yīng)的寄存器傳輸級(jí)(Register-Transfer Layer, RTL)的設(shè)計(jì)電路圖,采用Modelsim6.5a仿真工具對(duì)各個(gè)模塊和系統(tǒng)進(jìn)行仿真,然后將發(fā)送和接收各個(gè)模塊整合到一起進(jìn)行了整個(gè)系統(tǒng)的仿真。最后將設(shè)計(jì)好的差分跳頻通信系統(tǒng)下載到由Xilinx公司生產(chǎn)的Spartan-3E FPGA硬件平臺(tái)進(jìn)行了系統(tǒng)測(cè)試。 仿真和測(cè)試結(jié)果表明：各模塊和整體系統(tǒng)的軟件仿真和硬件測(cè)試結(jié)果都是正確的,接收端能夠正確解調(diào)出信源數(shù)據(jù),基本滿足了對(duì)差分跳頻通信系統(tǒng)的設(shè)計(jì)要求。
[Abstract]:Differential Frequency hopping (DFH) is a new frequency hopping technique which integrates modulation, demodulation and frequency hopping pattern. It solves the problem of improving data rate, resisting multipath and anti-tracking interference from high speed frequency hopping. Because differential frequency hopping pattern is based on traversal of directed graph, differential frequency hopping sequence also has the ability of correcting errors. The system performance is further improved, all of which make the differential frequency hopping technology represent the development direction of the new generation of shortwave anti-jamming communication technology. On the other hand, field programmable gate array (FPGA) has the advantages of high flexibility, reusability and short development cycle. It has been widely used in the design and development of communication system. Based on the basic principle and performance index of the conventional frequency-hopping communication system, this paper focuses on the key technologies of the differential frequency-hopping communication system. On this basis, the overall structure and design parameters of the differential frequency hopping communication system are given. The whole system includes two parts: sending and receiving. In the transmission system, it mainly includes the source module, the series-parallel conversion module, the frequency transfer function module and the DDS module; in the receiving system, it mainly includes the FFT transform module, the frequency sequence identification module, the decoding module based on Viterbi algorithm. Frequency transfer function inverse transform module, and serial conversion module. In this paper, in the ISE10.1 development environment of Xilinx, every module of Verilog hardware description language is designed in detail, the Synplify Pro9.6.2 synthesis tool is used to synthesize each module, and the design circuit diagram of register transfer level Register-Transfer layer (RTL) is given. Each module and system are simulated with Modelsim6.5a simulation tool, and the whole system is simulated by integrating the sending and receiving modules together. Finally, the designed differential frequency hopping communication system is downloaded to the Spartan-3E FPGA hardware platform produced by Xilinx for system test. The simulation and test results show that the software simulation and hardware test results of each module and the whole system are correct. The receiver can demodulate the source data correctly, which basically meets the design requirements of the differential frequency hopping communication system.
【學(xué)位授予單位】：大連海事大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TN914.41

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