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基于FPGA的射頻收發(fā)機(jī)實驗系統(tǒng)的設(shè)計與實現(xiàn)

發(fā)布時間:2018-06-06 14:15

  本文選題:FPGA + 無線通信 ; 參考:《電子科技大學(xué)》2015年碩士論文


【摘要】:隨著通信技術(shù)的發(fā)展,無線通信相關(guān)實驗教學(xué)受到越來越多的高校重視,對于無線通信實驗課程來說,良好的實驗系統(tǒng)必不可少。因此,構(gòu)建一套完善的無線通信實驗系統(tǒng)對培養(yǎng)學(xué)生創(chuàng)新能力、工程素養(yǎng)和提高對無線通信相關(guān)技術(shù)的理解具有重要意義。本實驗系統(tǒng)是一套超外差結(jié)構(gòu)射頻收發(fā)機(jī)實驗系統(tǒng),使用軟件定義無線電的技術(shù),基帶系統(tǒng)具有軟件可編程、可重構(gòu)特性,射頻和中頻電路也具有重新設(shè)定的能力,主要表現(xiàn)在工作頻率可調(diào);硬件結(jié)構(gòu)兼顧了超外差結(jié)構(gòu)和零中頻結(jié)構(gòu),滿足了通用性和兼容性的要求。硬件系統(tǒng)的設(shè)計難點在于數(shù);旌想娐返脑O(shè)計和信號完整性。本設(shè)計通過優(yōu)化布局布線,隔離數(shù)字芯片和模擬芯片以增加數(shù)模隔離度,優(yōu)化電源模塊,降低電源紋波從而抑制了噪聲的傳播,提高了系統(tǒng)的信噪比;鶐Р糠忠訟LTERA公司的CycloneIII芯片為核心進(jìn)行基帶信號的處理,輔以一塊ARM芯片作為控制芯片。數(shù)模轉(zhuǎn)換和模數(shù)轉(zhuǎn)換采用通信系統(tǒng)專用的高速TxDAC和Rx ADC,基帶信號的調(diào)制解調(diào)選用ADI公司的正交變頻器,接收機(jī)基帶部分使用一塊AGC芯片進(jìn)行接收信號的增益控制,本振信號源使用鎖相環(huán)的方法實現(xiàn),信號源的頻率可調(diào)。系統(tǒng)自身可實現(xiàn)中頻140MHz的通信,配合射頻前端可實現(xiàn)2.4GHz-2.48GHz的無線射頻通信。本實驗系統(tǒng)可以進(jìn)行不同頻的雙工通信,發(fā)射機(jī)和接收機(jī)的基帶信號處理程序同時運(yùn)行于一塊FPGA,采用硬件編程語言Verilog實現(xiàn)這些算法;鶐惴ㄔO(shè)計采用自頂向下的設(shè)計方法,將整個系統(tǒng)分成若干模塊,模塊下又分成若干子模塊,這樣設(shè)計系統(tǒng)層次分明、結(jié)構(gòu)清晰。發(fā)射機(jī)基帶信號處理包括視頻信號采集、并串轉(zhuǎn)換、幅度調(diào)制、偽隨機(jī)編碼、脈沖成形濾波等算法;接收機(jī)的基帶信號處理包括載波同步、符號同步、偽隨機(jī)解碼、幅度解調(diào)和串并轉(zhuǎn)換等算法;鶐盘柼幚淼暮诵乃惴ㄓ蠪IR濾波、載波同步、位同步等。使用高效的IP核實現(xiàn)了FIR濾波,大大提高了設(shè)計效率。載波同步和位同步都是用了反饋控制的方法來使同步更精確。
[Abstract]:With the development of communication technology, more and more colleges and universities attach importance to wireless communication experiment teaching, and a good experimental system is essential for wireless communication experiment course. Therefore, it is of great significance to construct a perfect wireless communication experimental system for cultivating students' innovation ability, engineering accomplishment and understanding of wireless communication related technology. This experiment system is an experimental system of radio transceiver with superheterodyne structure. The technology of defining radio by software is used. The baseband system has the characteristics of software programmable and reconfigurable, and the radio frequency and intermediate frequency circuits also have the ability to reconfigure. The main performance is that the working frequency is adjustable, and the hardware structure takes into account both the superheterodyne structure and the zero-intermediate frequency structure, which meet the requirements of universality and compatibility. The design difficulty of hardware system lies in the design of digital-analog hybrid circuit and signal integrity. Through optimizing layout and wiring, isolating digital chip and analog chip to increase the degree of digital-analog isolation, optimizing the power supply module, reducing the ripple of power supply, thus restraining the spread of noise and improving the signal-to-noise ratio of the system. The baseband part uses ALTERA CycloneIII chip as the core to process the baseband signal, and a ARM chip is used as the control chip. Digital-to-analog conversion and analog-to-digital conversion use high-speed TxDAC and RxADC. the modulation and demodulation of baseband signal is based on the quadrature frequency converter of ADI Company. The baseband part of the receiver uses a AGC chip to control the gain of the received signal. The method of phase-locked loop is used to realize the local oscillator signal source, and the frequency of the signal source can be adjusted. The system can realize if 140MHz communication and 2.4GHz-2.48GHz radio frequency communication with RF front end. The experimental system can be used for duplex communication with different frequencies. The baseband signal processing program of transmitter and receiver runs in a FPGA at the same time. These algorithms are implemented by hardware programming language Verilog. The design of baseband algorithm adopts top-down design method, the whole system is divided into several modules, and the module is divided into several sub-modules, so the design system is structured clearly and clearly. Transmitter baseband signal processing includes video signal acquisition, parallel string conversion, amplitude modulation, pseudorandom coding, pulse shaping filtering and so on, and receiver baseband signal processing includes carrier synchronization, symbol synchronization, pseudorandom decoding, etc. Amplitude demodulation and serial-parallel conversion algorithms. The core algorithms of baseband signal processing are FIR filtering, carrier synchronization, bit synchronization and so on. The efficient IP core is used to realize the FIR filter, which greatly improves the design efficiency. Both carrier and bit synchronization uses feedback control to make synchronization more accurate.
【學(xué)位授予單位】:電子科技大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2015
【分類號】:TN859

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 劉艷華;;基于matlab的移位寄存器法m序列的產(chǎn)生[J];科技視界;2012年02期

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本文編號:1986888

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