本文選題：高幀頻 + FPGA　； 參考：《電子科技大學(xué)》2014年碩士論文

【摘要】：隨著高幀頻數(shù)字相機(jī)的出現(xiàn),視頻圖像的數(shù)據(jù)量越來(lái)越大,這對(duì)數(shù)據(jù)的采集、傳輸與處理的各項(xiàng)技術(shù)指標(biāo)提出了更高的要求。高幀頻相機(jī)具有數(shù)據(jù)量大、輸出幀頻高的特點(diǎn),為了保證圖像數(shù)據(jù)的高速穩(wěn)定采集與傳輸,本文設(shè)計(jì)了高幀頻圖像的采集傳輸系統(tǒng)�，F(xiàn)場(chǎng)可編程邏輯門(mén)陣列的快速發(fā)展使得許多復(fù)雜、高速的圖像處理運(yùn)算的實(shí)現(xiàn)成為可能。Camera Link標(biāo)準(zhǔn)定義了數(shù)字相機(jī)采集接口,它是一個(gè)高速串行通信協(xié)議,Camera Link接口可以使相機(jī)的連接更加靈活簡(jiǎn)單,在圖像采集中得到了廣泛的應(yīng)用。PCI Express是新一代的高速串行I/O總線(xiàn),可以應(yīng)用于各類(lèi)計(jì)算機(jī)與外部設(shè)備之間的互連通信,它為嵌入式系統(tǒng)的傳輸接口提供了理想的解決方案。IEEE 1394b串行總線(xiàn)是在IEEE 1394a的基礎(chǔ)上發(fā)展而來(lái)的,可以進(jìn)行高速、遠(yuǎn)距離的傳輸,已經(jīng)被廣泛應(yīng)用于眾多領(lǐng)域中。本文介紹了目前較為先進(jìn)的Camera Link、PCI Expresss以及IEEE 1394b總線(xiàn)技術(shù),并根據(jù)這些技術(shù)標(biāo)準(zhǔn)設(shè)計(jì)了基于FPGA平臺(tái)的高幀頻圖像采集與傳輸系統(tǒng)。該系統(tǒng)采用Altera公司的FPGA芯片作為主要的內(nèi)核處理單元,使用Verilog語(yǔ)言實(shí)現(xiàn)FPGA的內(nèi)部邏輯,基于Camera Link接口進(jìn)行圖像數(shù)據(jù)的采集,并將采集到的圖像通過(guò)異步FIFO緩沖模塊存儲(chǔ)到DDR2 SDRAM中,然后通過(guò)PCI Express接口將數(shù)據(jù)傳輸?shù)缴衔粰C(jī)。另外,本文在PCI Experss傳輸模塊的基礎(chǔ)上,介紹了1394b的傳輸方案,能夠?qū)崿F(xiàn)圖像數(shù)據(jù)的遠(yuǎn)距離高速傳輸。本文主要分兩大部分對(duì)采集與傳輸系統(tǒng)進(jìn)行描述:圖像采集部分和數(shù)據(jù)傳輸部分。對(duì)于采集部分,本文介紹了基于Camera Link接口的硬件電路以及軟件程序的設(shè)計(jì),實(shí)現(xiàn)圖像數(shù)據(jù)接收和緩存處理、FPGA與相機(jī)之間的串行通信以及FPGA對(duì)相機(jī)接口的控制。對(duì)于圖像的傳輸部分,本文介紹了PCIE傳輸模塊和1394b傳輸模塊。首先在了解PCIE協(xié)議規(guī)范的基礎(chǔ)上,研究了PCIE IP硬核的產(chǎn)生方法以及PCIE傳輸部分應(yīng)用邏輯的設(shè)計(jì),實(shí)現(xiàn)了PCIE各分層協(xié)議的功能,并詳述了PCIE總線(xiàn)數(shù)據(jù)傳輸?shù)膶?shí)現(xiàn)方案。然后在PCIE總線(xiàn)接口的基礎(chǔ)上,結(jié)合1394b所采用的物理層和鏈路層芯片,講述了IEEE 1394b的芯片電路設(shè)計(jì)以及FPGA的NIOS II編程,設(shè)計(jì)了利用1394b總線(xiàn)進(jìn)行遠(yuǎn)距離傳輸?shù)姆桨浮？傊?本文設(shè)計(jì)了基于FPGA的高幀頻圖像采集與傳輸系統(tǒng),并對(duì)系統(tǒng)進(jìn)行仿真測(cè)試,驗(yàn)證了該系統(tǒng)的采集與傳輸功能。
[Abstract]:With the emergence of high frame rate digital camera, the amount of video image data is increasing, which puts forward higher requirements for the data acquisition, transmission and processing of various technical indicators. The high frame rate camera has the characteristics of large amount of data and high output frame frequency. In order to ensure the high-speed and stable acquisition and transmission of image data, a high frame rate image acquisition and transmission system is designed in this paper. With the rapid development of the field programmable logic gate array, the realization of high-speed image processing is possible. The camera Link standard defines the digital camera acquisition interface. It is a high-speed serial communication protocol and camera Link interface can make camera connection more flexible and simple. It has been widely used in image acquisition. PCI Express is a new generation of high-speed serial I / O bus. It provides an ideal solution for the transmission interface of embedded system. IEEE1394b serial bus is developed on the basis of IEEE 1394a. Long distance transmission has been widely used in many fields. This paper introduces the advanced Camera link Expresss and IEEE 1394b bus technology, and designs a high frame rate image acquisition and transmission system based on FPGA platform. The system uses Altera FPGA chip as the main core processing unit, uses Verilog language to realize the internal logic of FPGA, and collects image data based on Camera Link interface. The collected images are stored in the DDR2 SDRAM by asynchronous FIFO buffer module, and then transmitted to the host computer through the PCI Express interface. In addition, on the basis of PCI Experss transmission module, this paper introduces the 1394b transmission scheme, which can realize long distance and high speed transmission of image data. This paper is divided into two parts to describe the acquisition and transmission system: image acquisition and data transmission. For the acquisition part, this paper introduces the design of hardware circuit and software program based on the Camera Link interface, realizes the serial communication between the image data receiving and buffer processing and the camera, and the control of the camera interface by FPGA. For the image transmission part, this paper introduces the PCIE transmission module and 1394b transmission module. Firstly, on the basis of understanding the PCIE protocol specification, the generation method of the PCIE IP hard core and the design of the application logic of the PCIE transmission part are studied. The functions of the PCIE layered protocols are realized, and the implementation scheme of the PCIE bus data transmission is described in detail. Then on the basis of PCIE bus interface, combined with the physical layer and link layer chip used in 1394b, the circuit design of IEEE 1394b chip and the NIOS II programming of FPGA are described, and the scheme of long-distance transmission using 1394b bus is designed. In a word, a high frame rate image acquisition and transmission system based on FPGA is designed, and the system is simulated and tested to verify the function of the system.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類(lèi)號(hào)】：TN919.8

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 侯宏錄;王蓉;杜鵑;;基于FPGA的CMOS傳感器高速視頻采集系統(tǒng)[J];光電技術(shù)應(yīng)用;2010年05期

，

本文編號(hào)：1936985