本文選題：SAR圖像 + 降噪��； 參考：《西安電子科技大學(xué)》2014年碩士論文

【摘要】：SAR圖像即為合成孔徑雷達圖像,由于相干成像原理,SAR圖像受到相干斑噪聲的干擾,而相干斑噪聲模型并非傳統(tǒng)的加性噪聲模型,而是難以處理的乘性噪聲模型。在SAR圖像的降噪處理中,一般是將成像數(shù)據(jù)傳送至地面工作站,采用較為復(fù)雜且性能優(yōu)良的降噪算法,利用工作站進行并行計算以得到降噪圖像。然而在一些資源有限的即時應(yīng)用場合,例如SAR圖像的即時顯示或者高倍率壓縮后進行快速傳輸?shù)?這些場合難以利用工作站來預(yù)先對圖像進行降噪處理,而噪聲的存在對該應(yīng)用又存在較大影響。因此通過研究SAR圖像降噪處理算法,并利用集成度高、規(guī)模小的硬件系統(tǒng)來實現(xiàn)對SAR圖像的并行降噪處理,這種工程實現(xiàn)研究具有實際的需求和意義。本文在理解SAR圖像的特點及相關(guān)濾波方法后,綜合考慮降噪性能和硬件實現(xiàn)的復(fù)雜度,選取了基于非下采樣小波變換的閾值降噪算法來對SAR圖像進行降噪。該算法的原理、工程化實現(xiàn)方法、計算復(fù)雜度和降噪效果均在文中作了詳細介紹。在此基礎(chǔ)上設(shè)計相應(yīng)的專用指令集處理器ASIP內(nèi)核,并通過體系結(jié)構(gòu)、指令集和流水線,對該ASIP進行完整的描述。由于處理過程中涉及對數(shù)指數(shù)運算,該部分電路也較為關(guān)鍵,因此對其設(shè)計的詳細過程也作了描述。以ASIP構(gòu)成的ASIP陣列被用來對圖像進行并行降噪,ASIP陣列采用MIMD結(jié)構(gòu)的組織形式,而圖像被分割為圖像塊并交由ASIP進行處理。在明確了ASIP陣列的總體結(jié)構(gòu)及數(shù)據(jù)處理方式之后,結(jié)合軟硬件聯(lián)合仿真進行功能化的驗證,并通過XILINX ISE集成開發(fā)軟件進行綜合及布局布線,得到資源統(tǒng)計和時序分析結(jié)果。最后基于實驗室的專用圖像處理平臺,利用FPGA實現(xiàn)SAR圖像的降噪處理電路,得到工程化的降噪結(jié)果并進行評價。結(jié)果顯示,本文的SAR圖像降噪處理電路具備獨特的優(yōu)點,對資源限定場合的應(yīng)用具有參考意義。
[Abstract]:The SAR image is a synthetic aperture radar image. Because of the principle of coherent imaging, the speckle noise model is not the traditional additive noise model, but the multiplicative noise model which is difficult to deal with. In the denoising processing of SAR image, the imaging data is usually transmitted to the ground workstation. The noise reduction algorithm with more complex and excellent performance is adopted, and the parallel computation is carried out by the workstation to get the denoising image. However, in some real-time applications with limited resources, such as real-time display of SAR images or fast transmission after high rate compression, it is difficult to use workstations to pre-process the images. However, the existence of noise has a great influence on the application. Therefore, by studying the algorithm of SAR image de-noising and using the hardware system with high integration and small scale to realize the parallel de-noising of SAR image, this engineering implementation has practical demand and significance. After understanding the characteristics of SAR images and the related filtering methods, considering the performance of noise reduction and the complexity of hardware implementation, this paper selects a threshold denoising algorithm based on non-downsampling wavelet transform to reduce the noise of SAR images. The principle, engineering implementation, computational complexity and noise reduction effect of the algorithm are introduced in detail in this paper. On this basis, the ASIP kernel of the corresponding special instruction set processor is designed, and the ASIP is described completely through the architecture, instruction set and pipeline. Because the logarithmic exponent operation is involved in the process of processing, the circuit is also very important, so the detailed design process is also described. The ASIP array composed of ASIP is used to reduce the noise of the image in parallel. The MIMD structure is used in the ASIP array, and the image is segmented into blocks and processed by ASIP. After defining the overall structure and data processing mode of ASIP array, the functional verification is carried out with the combination of software and hardware simulation, and the results of resource statistics and time series analysis are obtained by synthesizing and routing by XILINX ISE integrated development software. Finally, based on the special image processing platform of the laboratory, the noise reduction circuit of SAR image is realized by using FPGA, and the engineering denoising results are obtained and evaluated. The results show that the SAR image denoising processing circuit in this paper has unique advantages and has reference significance for the application of resource-limited occasions.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：TN957.52

【共引文獻】

相關(guān)期刊論文 前10條

1 連超;;基于整數(shù)小波的圖像處理系統(tǒng)在硬件中的實現(xiàn)[J];信息技術(shù);2009年05期

2 段玉森;魏海萍;伏晴艷;高松;黃嶸;黃嫣e，

本文編號：1835926