基于DDS的雷達(dá)信號源設(shè)計
發(fā)布時間:2018-04-17 05:16
本文選題:直接數(shù)字頻率合成 + 現(xiàn)場可編程門陣列; 參考:《西安電子科技大學(xué)》2014年碩士論文
【摘要】:作為雷達(dá)系統(tǒng)的重要組成部分,雷達(dá)信號源在現(xiàn)代雷達(dá)系統(tǒng)中扮演著越來越重要的角色。雷達(dá)信號源的質(zhì)量對雷達(dá)系統(tǒng)整體性能的提高起著決定性的作用。相較于傳統(tǒng)的頻率合成方法,直接數(shù)字頻率合成(DDS)技術(shù)作為一種全新的頻率合成技術(shù)以其頻率分辨率高、頻率捷變速度快、相對帶寬較寬、頻率穩(wěn)定度高和頻率變化相位連續(xù)等優(yōu)點,在雷達(dá)系統(tǒng)領(lǐng)域的應(yīng)用越來越廣泛。第一章首先介紹了直接頻率合成技術(shù)(DS)、間接頻率合成技術(shù)(IS)和直接數(shù)字頻率合成技術(shù),然后討論了這三種頻率合成方法的優(yōu)缺點,最后分析了直接數(shù)字頻率合成技術(shù)在國際和國內(nèi)的發(fā)展和應(yīng)用情況。第二章首先重點用數(shù)學(xué)方法闡述了DDS技術(shù)的實現(xiàn)原理,并且介紹了DDS技術(shù)的各個組成部分:相位累加器、正弦查詢表、數(shù)模轉(zhuǎn)換器和低通濾波器。接下來重點分析了DDS技術(shù)在理想情況和非理想情況下的頻譜特點以及雜散的形成原因。最后根據(jù)相位截斷誤差和幅度量化誤差產(chǎn)生的原因和特點提出了幾種抑制DDS系統(tǒng)雜散的方法。第三章首先根據(jù)DDS技術(shù)的原理和結(jié)構(gòu)特點,設(shè)計了可以產(chǎn)生4路正弦信號或線性調(diào)頻信號的雷達(dá)信號源系統(tǒng)方案,開發(fā)了以FPGA+DAC為主要核心的板卡。接著討論了雷達(dá)信號源板卡的各個主要模塊:FPGA模塊、D/A模塊、USB控制模塊、DDS控制模塊、低通濾波器模塊以及時鐘和電源模塊的設(shè)計,并且介紹了各個模塊芯片的選型和硬件電路連接情況。第四章對系統(tǒng)方案中主要模塊的功能進(jìn)行了邏輯實現(xiàn)。首先介紹了在配置芯片的內(nèi)置寄存器時常用的SPI協(xié)議,并且利用此協(xié)議實現(xiàn)了時鐘芯片的配置。接下來實現(xiàn)了利用USB芯片完成上位機(jī)與FPGA通信的目的。然后利用DDS芯片產(chǎn)生了一路頻率、相位、幅度可調(diào)的正弦信號。接下來在FPGA中實現(xiàn)了DDS技術(shù)的主要功能模塊:相位累加器和正弦查詢表,產(chǎn)生了雷達(dá)信號源中比較常見的正弦信號和線性調(diào)頻信號。最后針對改善DDS技術(shù)的雜散問題提出了增大正弦查詢表尋址位數(shù)和壓縮波形存儲量的方法,降低了相位截斷誤差,提高了輸出頻譜的質(zhì)量,并且對DDS實現(xiàn)流程進(jìn)行了改良與優(yōu)化。第五章總結(jié)了本文的主要工作和有待改進(jìn)之處。
[Abstract]:As an important part of radar system, radar signal source plays a more and more important role in modern radar system.The quality of radar signal source plays a decisive role in improving the overall performance of radar system.Compared with the traditional frequency synthesis method, direct digital frequency synthesis (DDS) technology is a new kind of frequency synthesis technology, because of its high frequency resolution, fast frequency agility and wide relative bandwidth.Because of its high frequency stability and continuous phase variation, it has been widely used in radar systems.The first chapter introduces the direct frequency synthesis technology, the indirect frequency synthesis technology and the direct digital frequency synthesis technology, and then discusses the advantages and disadvantages of these three kinds of frequency synthesis methods.Finally, the development and application of direct digital frequency synthesis technology in international and domestic are analyzed.In the second chapter, the realization principle of DDS technology is introduced by mathematical method, and the components of DDS technology are introduced, such as phase accumulator, sine look-up table, digital-to-analog converter and low-pass filter.Then, the spectrum characteristics of DDS in ideal and non-ideal cases and the cause of stray are analyzed.Finally, according to the causes and characteristics of phase truncation error and amplitude quantization error, several methods to suppress stray in DDS system are proposed.In the third chapter, according to the principle and structure characteristics of DDS technology, we design a radar signal source system that can generate four channels of sinusoidal signal or linear frequency modulation signal, and develop a board with FPGA DAC as the main core.Then the design of DDS control module, low pass filter module, clock and power supply module are discussed, which are the main modules of radar signal source card:: FPGA module / D / A module, USB control module / DDS control module, low pass filter module, clock and power supply module.The selection of each module chip and the connection of hardware circuit are also introduced.In the fourth chapter, the function of the main modules in the system is implemented logically.This paper first introduces the SPI protocol which is commonly used to configure the built-in register of the chip, and realizes the configuration of the clock chip by using this protocol.The purpose of communication between host computer and FPGA is realized by using USB chip.Then the DDS chip is used to generate a sinusoidal signal with adjustable frequency, phase and amplitude.Then the main function modules of DDS technology are implemented in FPGA: phase accumulator and sinusoidal look-up table, which produce sinusoidal signal and linear frequency modulation signal which are common in radar signal source.Finally, aiming at improving the spurious problem of DDS technology, a method is proposed to increase the number of addressing bits and compress waveform storage of sine look-up table, which reduces the error of phase truncation and improves the quality of output spectrum.And the DDS implementation process has been improved and optimized.The fifth chapter summarizes the main work of this paper and the need for improvement.
【學(xué)位授予單位】:西安電子科技大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2014
【分類號】:TN957.51
【參考文獻(xiàn)】
相關(guān)期刊論文 前1條
1 蔡劍華;王先春;胡惟文;;DDS雜散抑制技術(shù)的研究與實現(xiàn)[J];微電子學(xué)與計算機(jī);2009年07期
,本文編號:1762235
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