本文選題：快速傅里葉變換 + 分裂基�。� 參考：《西安電子科技大學》2014年碩士論文

【摘要】：數(shù)字電子技術(shù)和信息技術(shù)日新月異，在多媒體應用技術(shù)計算機應用圖像與語音信號處理，通信服務等眾多領(lǐng)域中，都已經(jīng)廣泛地使用到基于數(shù)字信號處理的理論與技術(shù)快速傅里葉變換(FFT)在很大程度上推動了數(shù)字信號處理技術(shù)的發(fā)展，因為它的運算時間和直接計算離散傅里葉變換(DFT)相比大大減少，更有利于實現(xiàn)數(shù)字信號處理的應用，并為數(shù)字信號處理技術(shù)在實時處理各種信號的應用中提供了優(yōu)勢因此，本文對FFT算法和實現(xiàn)方法的研究對其進一步發(fā)展起到了非常重要的理論指導和實踐意義 經(jīng)過不斷地發(fā)展與應用，，可編程邏輯器件FPGA（現(xiàn)場可編程門陣列）正深入地滲透到數(shù)字信號處理領(lǐng)域的研究之中，它在不斷提高電子設計的規(guī)模與集成度的同時，使得電子系統(tǒng)設計方法和設計思想得到了不斷地創(chuàng)新 本文的研究內(nèi)容是立足FPGA實現(xiàn)分裂基FFT算法，分裂基FFT算法不僅計算流程圖比較簡單，而且具有結(jié)構(gòu)良好的特點，更重要的是這種算法在理論上，接近所需乘法次數(shù)的最小值本文首先對分裂基FFT算法的理論及原理知識進行了詳細的推導，隨后與基2FFT和基4FFT算法深入地進行比較說明，并論述了用FPGA實現(xiàn)的方法，使用高效復數(shù)乘法器，同時增加了數(shù)據(jù)溢出的處理本設計以Xilinx公司的Virtex-5系列芯片110T為硬件平臺，在ISE14.4編譯環(huán)境中，用Verilog硬件描述語言對各個功能模塊進行功能仿真，最后仿真實現(xiàn)256點的分裂基FFT算法用測試信號對本設計進行測試，并分析仿真結(jié)果和MATLAB計算結(jié)果的誤差，結(jié)果表明本文的設計正確
[Abstract]:Digital electronics and information technology are changing with each passing day. In many fields, such as computer application, image and speech signal processing, communication service, etc.Both have been widely used in theory and technology based on digital signal processing, fast Fourier transform (FFT) has promoted the development of digital signal processing technology to a great extent.Compared with the direct calculation of discrete Fourier transform (DFT), its computational time is greatly reduced, which is more advantageous to the application of digital signal processing, and provides an advantage for the digital signal processing technology in the application of real-time processing of various signals.In this paper, the study of FFT algorithm and implementation method plays a very important role in the further development of FFT algorithm and practice.Through the continuous development and application, FPGA (Field Programmable Gate Array) is penetrating deeply into the research of digital signal processing, which improves the scale and integration of electronic design at the same time.As a result, the design methods and design ideas of electronic systems have been innovated continuously.The research content of this paper is to realize split-base FFT algorithm based on FPGA. The split-base FFT algorithm is not only simple to calculate flow chart, but also has the characteristics of good structure.In this paper, the theoretical and theoretical knowledge of split base FFT algorithm is deduced in detail, then compared with base 2FFT and base 4FFT algorithm, and the method of using FPGA is discussed.Using high efficiency complex multiplier and adding data overflow processing, this design takes Virtex-5 series chip 110T of Xilinx Company as hardware platform, in ISE14.4 compiling environment, the function of each function module is simulated by Verilog hardware description language.Finally, a 256-point split-base FFT algorithm is implemented to test the design with test signal, and the error between simulation result and MATLAB calculation result is analyzed. The results show that the design of this paper is correct.
【學位授予單位】：西安電子科技大學
【學位級別】：碩士
【學位授予年份】：2014
【分類號】：TN911.7;TN791

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