本文選題：取樣示波器　切入點：數(shù)字信號處理模塊　出處：《電子科技大學》2014年碩士論文　論文類型：學位論文

【摘要】：取樣示波器具有高帶寬和高采樣率,能夠測量高速快變電子信號。取樣示波器的數(shù)字信號處理模塊是取樣示波器必不可少的部分。本論文闡述了取樣示波器的基本框架,并結(jié)合本項目的取樣示波器儀器來闡述本論文的取樣示波器的數(shù)字信號處理模塊的設(shè)計方案及其實現(xiàn)。該數(shù)字信號處理模塊的工作內(nèi)容從總體上可以分為數(shù)字信號處理模塊的硬件的設(shè)計與實現(xiàn)和其軟件的設(shè)計與實現(xiàn),從具體的實現(xiàn)內(nèi)容可以分為:與上位機通信、控制底層FPGA采集系統(tǒng)、接受并處理來自采集系統(tǒng)的原始數(shù)據(jù)、bootloader。硬件設(shè)計的內(nèi)容包括:建立最小系統(tǒng)、采用網(wǎng)絡(luò)與上位機PC來建立通訊,與底層FPGA通過外部存儲器接口和GPIO等接口建立通信。本設(shè)計的硬件選取以TI公司的TMS320C6747為核心的數(shù)字信號處理平臺。由于該平臺具有豐富的接口,如:網(wǎng)絡(luò)接口、外部存儲器接口、USB、UART、SPI等,所以該平臺能實現(xiàn)設(shè)計要求。硬件的實現(xiàn)流程是:硬件設(shè)計方案確定后,投版,然后對新電路板的調(diào)試。調(diào)試內(nèi)容分為單板調(diào)試與聯(lián)機調(diào)試。單板調(diào)試的內(nèi)容有:與本設(shè)計相關(guān)的網(wǎng)絡(luò)、中斷、啟動等模塊功能的調(diào)試,以及與上位機的脫機調(diào)試。聯(lián)機調(diào)試的內(nèi)容有:與底層FPGA之間的握手與通信,控制儀器的采集系統(tǒng)等內(nèi)容。最終的硬件測試結(jié)果是硬件各個模塊均能正常工作,并且實現(xiàn)聯(lián)機的所有測量內(nèi)容。本設(shè)計的軟件的操作系統(tǒng)采用DSP/BIOS內(nèi)核,并采用網(wǎng)絡(luò)開發(fā)套件(NDK)來設(shè)計網(wǎng)絡(luò)通信,進而設(shè)計一套多線程并發(fā)執(zhí)行的軟件程序。該多線程是一個父線程,兩個子線程。父線程作為網(wǎng)絡(luò)服務(wù)器端的守護線程,并一直存在直至系統(tǒng)關(guān)閉。兩個子線程可以解析上位機網(wǎng)絡(luò)命令,與底層FPGA通信,并通過這兩個子線程完成并發(fā)執(zhí)行。另外軟件設(shè)計包括bootloader內(nèi)容。由于高速取樣示波器的時基誤差導致測量結(jié)果不完善,所以本文對時基誤差做了概述。時基誤差包括時基抖動和時基失真。本設(shè)計采用總計平均的方法對隨機噪聲做了處理,采用正弦擬合的方法對時基失真做估算。經(jīng)過調(diào)試,本設(shè)計的性能滿足設(shè)計需求。本設(shè)計實現(xiàn)了取樣示波器數(shù)字信號處理模塊的基本功能,并估算了儀器的時基失真。
[Abstract]:Sampling oscilloscope has high bandwidth and high sampling rate, it can measure high speed and fast changing electronic signal. The digital signal processing module of sampling oscilloscope is an essential part of sampling oscilloscope. This paper describes the basic frame of sampling oscilloscope. The design and implementation of the digital signal processing module of the sampling oscilloscope in this paper are described. The working content of the digital signal processing module can be divided into digital signal processing module in general. The design and implementation of the hardware and software of the processing module, From the concrete implementation content can be divided into: communication with the host computer, control the bottom FPGA acquisition system, receive and process the raw data from the acquisition system bootloader.hardware design content includes: build the minimum system, Using network and PC to establish communication, The hardware of this design is a digital signal processing platform with TI's TMS320C6747 as the core. Because of its rich interface, such as network interface, the hardware of this platform is designed to communicate with the underlying FPGA through external memory interface and GPIO interface. The external memory interface is USBU UART SPI and so on, so the platform can meet the design requirements. Then the debugging of the new circuit board is divided into single board debugging and on-line debugging. The contents of on-line debugging include handshake and communication with bottom FPGA, acquisition system of control instrument and so on. The final hardware test result is that each module of hardware can work normally. The operating system of the software is designed with DSP/BIOS kernel and network development kit (NDK) to design network communication. The multithread is a parent thread, two child threads. The parent thread is the daemon thread on the network server side. Two sub-threads can parse the host computer network commands and communicate with the underlying FPGA. In addition, the software design includes bootloader content. Because of the time-base error of high-speed sampling oscilloscope, the measurement result is not perfect. Therefore, the time base error is summarized in this paper. The time base error includes time base jitter and time base distortion. In this design, the random noise is treated by the method of total average, and the time base distortion is estimated by the method of sinusoidal fitting. The function of the digital signal processing module of the sampling oscilloscope is realized, and the time-base distortion of the instrument is estimated.
【學位授予單位】：電子科技大學
【學位級別】：碩士
【學位授予年份】：2014
【分類號】：TN911.72;TM935.3

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本文編號：1651452