本文選題：微型SAR　切入點(diǎn)：數(shù)據(jù)回放　出處：《國(guó)防科學(xué)技術(shù)大學(xué)》2014年碩士論文　論文類型：學(xué)位論文

【摘要】：在SAR實(shí)時(shí)信號(hào)處理機(jī)的研制調(diào)試過程中,數(shù)據(jù)回放技術(shù)至關(guān)重要。本文以微型SAR實(shí)時(shí)成像處理機(jī)的研制為背景,基于實(shí)時(shí)處理機(jī)平臺(tái),展開了大數(shù)據(jù)量高速數(shù)據(jù)回放技術(shù)的研究并獲得了實(shí)際應(yīng)用。該回放技術(shù)的實(shí)現(xiàn)以大容量CF卡作為存儲(chǔ)介質(zhì),以FPGA作為主控芯片,通過串行RapidIO技術(shù)實(shí)現(xiàn)了高速數(shù)據(jù)傳輸,滿足了實(shí)時(shí)成像處理機(jī)對(duì)數(shù)據(jù)回放的要求。本文主要工作概括如下:1、研究了CF卡的技術(shù)標(biāo)準(zhǔn)及其FAT32文件管理系統(tǒng)。為降低文件管理系統(tǒng)的操作復(fù)雜度和提高CF卡的數(shù)據(jù)傳輸速率,通過對(duì)CF卡中文件的定量操作以及FAT表、FDT表和文件數(shù)據(jù)區(qū)的分開管理,設(shè)計(jì)了實(shí)時(shí)文件管理系統(tǒng)并分析了其性能。所設(shè)計(jì)的實(shí)時(shí)文件管理系統(tǒng)具有操作簡(jiǎn)單可靠的特點(diǎn)。2、研究了RapidIO技術(shù)并給出了串行RapidIO(SRIO)在Xilinx Virtex6系列FPGA和TMS320C6678 DSP中的實(shí)現(xiàn)方法。為滿足數(shù)據(jù)回放過程中的數(shù)據(jù)傳輸需求,設(shè)計(jì)了FPGA與DSP之間的SRIO鏈路,通過具體配置FPGA中SRIO IP核和修改其中HDL源碼以及初始化DSP中SRIO模塊,實(shí)現(xiàn)了FPGA與DSP間的數(shù)據(jù)傳輸,具有數(shù)據(jù)傳輸速率快的特點(diǎn)。3、介紹了某微型SAR實(shí)時(shí)成像處理機(jī),通過處理機(jī)實(shí)際工作過程中數(shù)據(jù)流程的分析,設(shè)計(jì)了一種定時(shí)突發(fā)的數(shù)據(jù)回放方案,實(shí)現(xiàn)了對(duì)實(shí)時(shí)成像處理機(jī)機(jī)載飛行條件下工作過程的模擬。在詳細(xì)研究了數(shù)據(jù)回放技術(shù)的實(shí)現(xiàn)途徑的基礎(chǔ)上,實(shí)現(xiàn)了SAR數(shù)據(jù)的回放,并利用CCS5和ChipScope軟件對(duì)回放數(shù)據(jù)的正確性進(jìn)行了驗(yàn)證。通過對(duì)突發(fā)過程中數(shù)據(jù)回放速率的測(cè)試,數(shù)據(jù)傳輸速率穩(wěn)定在70.6MB/s,滿足高速數(shù)據(jù)回放的要求。4、為滿足實(shí)時(shí)成像處理機(jī)調(diào)試的需求,設(shè)計(jì)實(shí)現(xiàn)了控制數(shù)據(jù)回放的上位機(jī)軟件,進(jìn)行了功能的正確性測(cè)試。測(cè)試結(jié)果表明該上位機(jī)可靈活有效地實(shí)現(xiàn)數(shù)據(jù)回放過程的控制。最后,結(jié)合上位機(jī)的控制給出了數(shù)據(jù)回放在實(shí)時(shí)成像處理機(jī)調(diào)試過程中的應(yīng)用。
[Abstract]:In the process of development and debugging of SAR real time signal processor, data playback technology is very important. This paper takes the development of micro SAR real time imaging processor as the background, based on the real time processor platform. In this paper, the high speed data playback technology of large amount of data is studied and applied in practice. The realization of this technology is based on large capacity CF card as storage medium, FPGA as main control chip and serial RapidIO technology to realize high speed data transmission. The main work of this paper is summarized as follows: 1. The technical standard of CF card and its FAT32 file management system are studied. In order to reduce the operational complexity of the file management system and improve the CF card. Data transfer rate, Through the quantitative operation of the files in the CF card and the separate management of the FAT table and the file data area, The real-time file management system is designed and its performance is analyzed. The designed real-time file management system has the characteristics of simple and reliable operation. The RapidIO technology is studied and the implementation of serial rapid file management system in Xilinx Virtex6 series FPGA and TMS320C6678 DSP is given. In order to meet the requirements of data transmission in the process of data playback, The SRIO link between FPGA and DSP is designed. By configuring the SRIO IP core in FPGA, modifying the source code of HDL and initializing the SRIO module in DSP, the data transmission between FPGA and DSP is realized. In this paper, a micro SAR real-time imaging processor is introduced. Through the analysis of the data flow in the actual working process of the processor, a timing burst data playback scheme is designed. The simulation of the working process of real-time imaging processor under airborne flight condition is realized. Based on the detailed study of the implementation of data playback technology, the playback of SAR data is realized. The correctness of playback data is verified by using CCS5 and ChipScope software. The data transmission rate is stable at 70.6 MB / s, which meets the requirement of high speed data playback. In order to meet the needs of the debugging of real-time imaging processor, a host computer software is designed and implemented to control the data playback. The test results show that the upper computer can control the data playback process flexibly and effectively. Finally, the application of data playback in the debugging process of real-time imaging processor is given in combination with the control of the upper computer.
【學(xué)位授予單位】：國(guó)防科學(xué)技術(shù)大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TN957.52

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