本文選題：FPGA　切入點(diǎn)：RS　出處：《計(jì)算機(jī)測(cè)量與控制》2014年02期 　論文類型：期刊論文

【摘要】：針對(duì)某圖像跟蹤系統(tǒng)的通信需求,提出了一種在FPGA(現(xiàn)場(chǎng)可編程門陣列)上實(shí)現(xiàn)串口與鏈路口聯(lián)合通信的方法;首先闡述了串口通信和鏈路口通信的基本原理,然后介紹了FPGA平臺(tái)的硬件組成,重點(diǎn)對(duì)實(shí)現(xiàn)聯(lián)合通信的各部分模塊進(jìn)行了說明;整個(gè)系統(tǒng)結(jié)構(gòu)采用模塊化設(shè)計(jì),適用于自頂向下的設(shè)計(jì)方法;最后,在QuartusⅡ8.1平臺(tái)上運(yùn)用VWF(矢量波形文件)對(duì)各部分模塊以及整個(gè)聯(lián)合通信系統(tǒng)進(jìn)行了仿真,其中"接收數(shù)據(jù)"由人工設(shè)定,觀察到的"發(fā)送數(shù)據(jù)"與其一致,驗(yàn)證了設(shè)計(jì)的正確性和可靠性;該方法已成功應(yīng)用于圖像跟蹤系統(tǒng)中。
[Abstract]:According to the communication requirement of an image tracking system, a method of realizing the joint communication between serial port and chain intersection on FPGA (Field Programmable Gate Array) is presented. Then, the hardware composition of FPGA platform is introduced, and the modules to realize joint communication are emphasized. The whole system structure is designed by modularization, which is suitable for top-down design. Finally, The VWF (Vector Waveform File) is used to simulate each module and the whole joint communication system on the platform of Quartus 鈪，

本文編號(hào)：1583547