本文選題：模數(shù)結(jié)合　切入點(diǎn)：旁瓣對消　出處：《電子科技大學(xué)》2014年碩士論文　論文類型：學(xué)位論文

【摘要】：隨著衛(wèi)星技術(shù)的發(fā)展,衛(wèi)星通信抗干擾受到各國的重視,如今已經(jīng)成為抗干擾研究的一個(gè)熱點(diǎn)話題。某型號衛(wèi)星通信系統(tǒng)使用了相控陣天線技術(shù),通過控制陣列方向圖主瓣指向,加強(qiáng)有用信號,提高通信效果。現(xiàn)在為了增強(qiáng)系統(tǒng)對抗從陣列方向圖旁瓣進(jìn)入的壓制式干擾信號的能力,在盡量小改動(dòng)原系統(tǒng)結(jié)構(gòu)的前提下,采用了一種模數(shù)結(jié)合的旁瓣對消方法對系統(tǒng)加以改進(jìn)。本文主要內(nèi)容就是在一個(gè)簡化系統(tǒng)上對這種模數(shù)結(jié)合的旁瓣對消方法進(jìn)行設(shè)計(jì)和實(shí)現(xiàn),檢驗(yàn)此方法的性能,為其能否應(yīng)用到實(shí)際衛(wèi)星通信系統(tǒng)提供參考。文中首先針對相控陣介紹了有關(guān)自適應(yīng)波束形成的相關(guān)理論,包括波束形成的原理、準(zhǔn)則和實(shí)現(xiàn)算法,并對旁瓣對消方法的原理進(jìn)行了詳細(xì)介紹,為后文中模數(shù)結(jié)合旁瓣對消方法的理論和實(shí)現(xiàn)奠定基礎(chǔ)。然后介紹了模數(shù)結(jié)合旁瓣對消方法的具體實(shí)現(xiàn)方案,給出了實(shí)驗(yàn)所用系統(tǒng)的硬件結(jié)構(gòu),分析了系統(tǒng)的工作原理。該方法把系統(tǒng)分為了模擬端和數(shù)字端兩個(gè)部分,在數(shù)字端利用一種無阻塞矩陣旁瓣對消方法計(jì)算干擾抑制權(quán)值,并通過迭代的方法使其靠近系統(tǒng)的最優(yōu)權(quán)值;在模擬端則將數(shù)字端求解的權(quán)值作用到一個(gè)由數(shù)字衰減器和數(shù)字移相器構(gòu)成的幅相加權(quán)模塊上,在信號射頻段直接進(jìn)行干擾抑制。之后,針對文中的模數(shù)結(jié)合旁瓣對消方法進(jìn)行了一系列仿真。比較了無阻塞矩陣旁瓣對消和常規(guī)的旁瓣對消方法性能,說明設(shè)計(jì)中采用前者的原因;驗(yàn)證了文中權(quán)值迭代方法的正確性,并研究了迭代方法的收斂性;分析了權(quán)值求解算法的性能,選擇一種SMI和LMS結(jié)合算法作為數(shù)字端權(quán)值計(jì)算的具體方法;討論了實(shí)現(xiàn)過程中衰減器和移相器性能對干擾抑制效果的影響。最后對系統(tǒng)數(shù)字信號處理部分在FPGA中的具體實(shí)現(xiàn)做了詳細(xì)介紹,給出包括信號去直流、數(shù)字下變頻、系統(tǒng)干擾檢測、SMI和LMS聯(lián)合求解權(quán)值、權(quán)值轉(zhuǎn)換和RS-232接口數(shù)據(jù)傳輸各模塊的實(shí)現(xiàn)方案和對應(yīng)的Modelsim仿真結(jié)果。并最終到實(shí)際系統(tǒng)上進(jìn)行了測試,驗(yàn)證了此模數(shù)結(jié)合旁瓣對消方法對干擾抑制的有效性。
[Abstract]:With the development of satellite technology, the anti-jamming of satellite communication has been paid more and more attention by many countries, and it has become a hot topic in the research of anti-jamming. A certain type of satellite communication system uses phased array antenna technology. By controlling the direction of the main lobe of the array pattern, the useful signal is strengthened and the communication effect is improved. Now, in order to enhance the system's ability to resist the suppressed interference signal coming from the sidelobe of the array pattern, the original system structure is changed as little as possible. An analog-to-digital sidelobe cancellation method is used to improve the system. The main content of this paper is to design and implement this analog-to-digital sidelobe cancellation method on a simplified system, and to test the performance of this method. This paper first introduces the theory of adaptive beamforming for phased array, including the principle, criterion and implementation algorithm of beamforming. The principle of sidelobe cancellation method is introduced in detail, which lays a foundation for the theory and realization of modular combined sidelobe cancellation method, and then introduces the concrete realization scheme of modular combined sidelobe cancellation method. The hardware structure of the system used in the experiment is given, and the working principle of the system is analyzed. The system is divided into two parts, the analog end and the digital end. In the digital end, a non-blocking matrix sidelobe cancellation method is used to calculate the interference suppression weight. The iterative method is used to make it close to the optimal weight value of the system. At the analog end, the weights solved by the digital terminal are applied to a amplitude-phase weighting module composed of digital attenuators and digital phase shifters. The interference suppression is carried out directly in the radio frequency segment of the signal. Then, a series of simulations are carried out for the analog-to-digital sidelobe cancellation method in this paper. The performance of the non-blocking matrix sidelobe cancellation method and the conventional sidelobe cancellation method are compared. The reason why the former method is used in the design is explained, the correctness of the iterative method is verified, and the convergence of the iterative method is studied, and the performance of the algorithm is analyzed. A combination algorithm of SMI and LMS is chosen as the concrete method to calculate the digital end weight. The influence of the performance of attenuator and phase shifter on the effect of interference suppression is discussed. Finally, the realization of digital signal processing in FPGA is introduced in detail, including signal de-DC, digital downconversion, etc. The system interference detection and LMS solve the weight value, the weight conversion and the data transmission module of RS-232 interface and the corresponding Modelsim simulation results. Finally, the system is tested on the actual system. The effectiveness of this method combined with sidelobe cancellation for interference suppression is verified.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：TN927.2

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本文編號：1563036