基于壓縮感知的重構(gòu)算法研究及其VLSI實(shí)現(xiàn)
本文關(guān)鍵詞: 壓縮感知 子空間追蹤算法 最小二乘方程求解 VLSI 出處:《復(fù)旦大學(xué)》2014年碩士論文 論文類型:學(xué)位論文
【摘要】:壓縮感知(c ompressive Sensing, CS)理論是近年來在信號(hào)處理領(lǐng)域新興起的一門理論,該理論指出在信號(hào)滿足稀疏性的情況下,能夠以低于奈奎斯特(Nyquist)采樣速率的速度對(duì)信號(hào)進(jìn)行觀測,只需要獲取較少的數(shù)據(jù)點(diǎn)就能夠通過重構(gòu)算法精確的恢復(fù)信號(hào),如此優(yōu)越的特質(zhì)使其有著廣闊的應(yīng)用前景,并得到了廣泛的研究。重構(gòu)算法研究是壓縮感知理論的重要組成部分,國內(nèi)外學(xué)者也進(jìn)行了大量的研究,主要集中在三個(gè)方向,一類是凸優(yōu)化算法、一類是貪婪算法、一類是組合算法。其中的貪婪算法,計(jì)算復(fù)雜度小、重構(gòu)速度快、易于實(shí)現(xiàn),使其更加利于實(shí)際應(yīng)用。通過對(duì)不同的貪婪算法的仿真分析,本文在性能優(yōu)越的子空間追蹤算法(Subspace Pursuit, SP)基礎(chǔ)上,綜合考慮性能,重構(gòu)時(shí)間和實(shí)現(xiàn)面積等因素,對(duì)算法進(jìn)行了改進(jìn)和優(yōu)化,設(shè)計(jì)實(shí)現(xiàn)了一種重構(gòu)算法加速器。將SP算法中的兩次最小二乘操作優(yōu)化為一次最小二乘操作,降低了計(jì)算復(fù)雜度和實(shí)現(xiàn)面積,并減小了重構(gòu)時(shí)間,同時(shí)很好的保證了重構(gòu)精確度。在具體的硬件實(shí)現(xiàn)過程中,矩陣取逆采用ACD(Alternative Cholesky Decomposition)算法,并將該算法設(shè)計(jì)成脈動(dòng)陣列結(jié)構(gòu),從而提高了電路性能。對(duì)于硬件實(shí)現(xiàn)的復(fù)雜單元除法器,采用了移位和減法來代替,從而去除了關(guān)鍵路徑延時(shí),并減小了實(shí)現(xiàn)面積。通過復(fù)用ACD算法模塊中的乘法器單元完成其他模塊中的乘法操作進(jìn)一步的減小了實(shí)現(xiàn)面積。本文設(shè)計(jì)的重構(gòu)算法加速器,采用長度為64的觀測信號(hào),利用高斯隨機(jī)分布矩陣,對(duì)信號(hào)長度為256、稀疏度為8的數(shù)字信號(hào)進(jìn)行了重構(gòu),使用SMIC 65nm工藝對(duì)設(shè)計(jì)進(jìn)行了綜合,綜合后的面積為2316K Gates,工作頻率為222.2MHz。
[Abstract]:The theory of compressed ompressive sensing is a new theory in the field of signal processing in recent years. The theory points out that the signal can be observed at a rate lower than Nyquist sampling rate when the signal satisfies sparsity. It takes only a small number of data points to recover the signal accurately through the reconstruction algorithm, which makes it have a broad application prospect. The research of reconstruction algorithm is an important part of the theory of compression perception, and scholars at home and abroad have also carried out a lot of research, mainly focusing on three directions, one is convex optimization algorithm, the other is greedy algorithm. One is the combinatorial algorithm. The greedy algorithm has the advantages of low computational complexity, fast reconstruction speed and easy implementation, which makes it more suitable for practical application. On the basis of subspace pursuit (SP) algorithm with superior performance, this paper improves and optimizes the algorithm by taking into account the factors of performance, reconstruction time and realization area, etc. This paper designs and implements a reconstruction algorithm accelerator, optimizes the two least squares operation in SP algorithm into one least squares operation, reduces the computational complexity and area, and reduces the reconstruction time. At the same time, the reconstruction accuracy is guaranteed well. In the process of hardware implementation, the inverse matrix is adopted by ACD(Alternative Cholesky Decompositionalgorithm, and the algorithm is designed into a pulsating array structure. Therefore, the circuit performance is improved. For the complex cell divider realized by hardware, shift and subtraction are used instead, thus the critical path delay is eliminated. By multiplexing the multiplier unit in the ACD algorithm module to complete the multiplication operation in other modules, the realized area is further reduced. The reconstruction algorithm accelerator designed in this paper uses the observation signal of 64 length. By using Gao Si random distribution matrix, the digital signal with a signal length of 256 and a sparsity of 8 is reconstructed. The design is synthesized by SMIC 65nm process. The integrated area is 2316K Gatesand the working frequency is 222.2 MHz.
【學(xué)位授予單位】:復(fù)旦大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2014
【分類號(hào)】:TN911.7;TN47
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