本文關(guān)鍵詞： HEVC CUDA 并行算法 幀內(nèi)預(yù)測(cè)　出處：《大連理工大學(xué)》2015年碩士論文　論文類型：學(xué)位論文

【摘要】：隨著人們對(duì)視頻質(zhì)量要求的不斷提高,在H.264/AVC視頻編碼標(biāo)準(zhǔn)之后于2013年,國(guó)際視頻編碼專家組VCEG和動(dòng)態(tài)圖像專家組MPEG聯(lián)合推出了最新的高性能視頻編碼標(biāo)準(zhǔn)HEVC, HEVC的目標(biāo)是比H.264節(jié)省大約50%的碼率。HEVC編碼性能的提高是以計(jì)算復(fù)雜度大幅度增加為代價(jià)的,為了更廣泛的應(yīng)用HEVC,有必要提高編碼速度,于是如何提高HEVC編碼效率成為了研究熱點(diǎn)。目前大多數(shù)計(jì)算機(jī)中最主要的兩種處理器分別是多核CPU和眾核GPU, GPU擁有大量的運(yùn)算單元,適用于通用并行計(jì)算。NVIDIA公司推出的計(jì)算機(jī)統(tǒng)一設(shè)備架構(gòu)——CUDA為GPU編程提供了很好的平臺(tái)。本文基于HEVC標(biāo)準(zhǔn)算法,針對(duì)幀內(nèi)預(yù)測(cè)中的關(guān)鍵技術(shù),設(shè)計(jì)相應(yīng)的并行算法,并基于CUDA進(jìn)行實(shí)現(xiàn)。文中首先分析數(shù)據(jù)之間的相關(guān)性,然后針對(duì)亮度分量和色度分量幀內(nèi)預(yù)測(cè)求取預(yù)測(cè)值設(shè)計(jì)不同的并行算法；針對(duì)整數(shù)DCT變換和反變換,基于蝶形快速算法設(shè)計(jì)并行算法；針對(duì)量化和反量化設(shè)計(jì)并行算法；針對(duì)幀內(nèi)預(yù)測(cè)并行算法進(jìn)行優(yōu)化。另外,本文設(shè)計(jì)了一種逐步縮小模式搜索范圍的幀內(nèi)預(yù)測(cè)快速算法,在預(yù)測(cè)精度損失較小的條件下將其計(jì)算量減小一半以上。針對(duì)快速算法設(shè)計(jì)了并行算法,并基十CUDA實(shí)現(xiàn)。本文對(duì)設(shè)計(jì)的各個(gè)并行算法均在CPU+GPU異構(gòu)平臺(tái)上采用CUDA語(yǔ)言進(jìn)行編程實(shí)現(xiàn),并使用高清視頻序列進(jìn)行了大量實(shí)驗(yàn)。實(shí)驗(yàn)表明,本文的幀內(nèi)預(yù)測(cè)并行算法相比于原始算法在保證圖像質(zhì)量的前提下,加速比可達(dá)5.6倍；快速幀內(nèi)預(yù)測(cè)并行算法相比于原始算法在基本不改變圖像質(zhì)量的前提下,加速比可達(dá)8.5倍。
[Abstract]:In 2013, after the H.264 / AVC video coding standard, with increasing demand for video quality, The international video coding expert group VCEG and the dynamic image expert group MPEG jointly launched the latest high-performance video coding standard HEVC. The goal of HEVC is to save about 50% bit rate compared with H.264. The improvement of the performance of HEVC coding is at the cost of a significant increase in computational complexity. In order to apply HEVC more widely, it is necessary to improve the coding speed, so how to improve the efficiency of HEVC coding has become a research hotspot. At present, the two main processors in most computers are multi-core CPU and multi-core GPU, and GPU has a large number of computing units. The computer unified device architecture, which is suitable for general parallel computing. NVIDIA, provides a good platform for GPU programming. Based on the HEVC standard algorithm, this paper designs the corresponding parallel algorithm for the key technology of intra prediction. In this paper, we first analyze the correlation between data, then design different parallel algorithms for intra prediction of luminance component and chrominance component, and design different parallel algorithms for integer DCT transform and inverse transform. Design parallel algorithm based on butterfly fast algorithm; design parallel algorithm for quantization and inverse quantization; optimize parallel algorithm for intra prediction. In addition, this paper designs a fast algorithm of intra prediction which gradually reduces the scope of pattern search. The computational complexity is reduced by more than half under the condition that the loss of prediction precision is small. A parallel algorithm is designed for the fast algorithm. In this paper, all parallel algorithms are programmed on the CPU GPU heterogeneous platform with CUDA language, and a large number of experiments are carried out using high-definition video sequences. Compared with the original algorithm, the in-frame prediction parallel algorithm in this paper has a speedup of 5.6 times on the premise of guaranteeing image quality, and compared with the original algorithm, the fast intra prediction parallel algorithm does not change the image quality. The acceleration ratio can reach 8.5 times.
【學(xué)位授予單位】：大連理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN919.81

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相關(guān)碩士學(xué)位論文 前1條

1 吳羨;H.264編碼關(guān)鍵模塊并行算法設(shè)計(jì)及其在CUDA上的實(shí)現(xiàn)[D];大連理工大學(xué);2014年

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本文編號(hào)：1519178