基于MCM的SAR數(shù)據(jù)處理模塊關(guān)鍵技術(shù)研究
發(fā)布時間:2018-02-10 07:34
本文關(guān)鍵詞: 合成孔徑雷達 多芯片組件 低溫共燒陶瓷 信號完整性 出處:《西安電子科技大學》2014年碩士論文 論文類型:學位論文
【摘要】:合成孔徑雷達具有全天候偵查能力,是一種重要的偵查測量手段,很多領(lǐng)域都對合成孔徑雷達有明確的需求。近年來,設(shè)備小型化技術(shù)得到了充足的發(fā)展,在技術(shù)上已經(jīng)可以做到合成孔徑雷達的小型化,以方便合成孔徑雷達安裝在小型載具上使用。實現(xiàn)合成孔徑雷達小型化的關(guān)鍵技術(shù)有多芯片組件技術(shù)和LTCC技術(shù)。多芯片組件技術(shù)是一種組裝效率較高的微電子組裝技術(shù),它將大量電子元器件組裝在面積較小的高密度互連基板上;宓脑O(shè)計是多芯片組件設(shè)計的關(guān)鍵。低溫共燒陶瓷基板有燒結(jié)溫度低、燒結(jié)收縮率穩(wěn)定、介質(zhì)材料介電常數(shù)小絕緣性好、導體電阻率小、層疊數(shù)目不受限制等優(yōu)良特性。低溫共燒陶瓷基板的這些優(yōu)點極大地方便了基板的設(shè)計。多芯片組件將大量的電子元器件組裝在面積還很小的基板上,致使電子元器件間距很小,布線密度很大,必然會導致信號完整性問題的出現(xiàn)。因此有必要對多芯片組件進行信號完整性仿真,并以仿真結(jié)果指導多芯片組件的設(shè)計。本文主要研究了基板內(nèi)部過孔對信號完整性的影響。首先,本文為過孔建立了電氣模型,該模型是一個π形電路,包括一個寄生電容和兩個寄生電感。然后本文通過對該模型進行仿真研究了當過孔位于信號線末端和信號線中間兩種情況下過孔對信號完整性的影響。仿真結(jié)果表明,過孔對信號完整性的影響隨寄生電容和寄生電感的增大而增大;當過孔位于信號線中間時對信號完整性的影響要大于位于末端的情況。因此在設(shè)計多芯片組件時盡量選用寄生效應(yīng)的過孔并減少使用數(shù)量。在考慮信號完整性的前提下,本文以合成孔徑雷達的小型化為出發(fā)點,研究了使用多芯片組件技術(shù)對合成孔徑雷達的數(shù)據(jù)處理模塊進行重新設(shè)計和實現(xiàn)的問題。首先,對原有的數(shù)據(jù)處理模塊進行重組以滿足三維多芯片組件的結(jié)構(gòu)要求。原數(shù)據(jù)處理模塊被設(shè)計成三維多芯片組件的結(jié)構(gòu),由封裝保護外殼、頂層二維多芯片組件、底層二維多芯片組件和垂直互連部件四大部分組成。然后使用Cadence軟件為重組的數(shù)據(jù)處理模塊建立符號庫、封裝庫、設(shè)計原理圖、設(shè)計版圖并導出生產(chǎn)數(shù)據(jù),生產(chǎn)數(shù)據(jù)主要包括鉆孔數(shù)據(jù)文件和光繪數(shù)據(jù)文件。最后根據(jù)導出的生產(chǎn)數(shù)據(jù)采用低溫共燒陶瓷技術(shù)經(jīng)過實現(xiàn)三維多芯片組件數(shù)據(jù)處理模塊。
[Abstract]:Synthetic Aperture Radar (SAR) has the ability of all-weather investigation and is an important means of investigation and measurement. In many fields, synthetic Aperture Radar (SAR) has a clear demand. In recent years, the miniaturization technology of equipment has been fully developed. Technically, it has been possible to miniaturize synthetic aperture radar, The key technologies to realize the miniaturization of synthetic Aperture Radar are multi-chip module technology and LTCC technology. Multi-chip module technology is a kind of micro-electronic assembly technology with high assembly efficiency. A large number of electronic components are assembled on a high-density interconnect substrate with small area. The design of the substrate is the key to the design of multi-chip modules. The low temperature co-fired ceramic substrate has low sintering temperature and stable sintering shrinkage. The dielectric constant is small and the dielectric constant is good, and the resistivity of the conductor is small. The advantages of low temperature co-fired ceramic substrates greatly facilitate the design of substrates. Multichip modules assemble a large number of electronic components on substrates with very small area. It is necessary to simulate the signal integrity of multi-chip modules because the distance between electronic components is very small and the wiring density is very high, which will inevitably lead to the problem of signal integrity. And the simulation results are used to guide the design of multi-chip components. This paper mainly studies the influence of the internal perforation on the signal integrity. Firstly, an electrical model is established for the perforation, which is a 蟺-shaped circuit. It includes a parasitic capacitance and two parasitic inductors. Then, the effect of the perforation on the signal integrity is studied by the simulation of the model when the hole is located at the end of the signal line and in the middle of the signal line. The effect of perforation on signal integrity increases with the increase of parasitic capacitance and inductance. When the hole is in the middle of the signal line, the effect on the signal integrity is greater than that at the end. Therefore, when designing the multichip module, the parasitic effect is chosen as much as possible and the number of using is reduced. Based on the miniaturization of synthetic Aperture Radar (SAR), this paper studies the redesign and implementation of SAR data processing module using multi-chip module technology. The original data processing module is reorganized to meet the structural requirements of the 3D multi-chip module. The original data processing module is designed into the structure of the three-dimensional multi-chip module, which is encapsulated and protected by the shell, and the top layer of the two-dimensional multi-chip module. There are four parts of the bottom 2-D multi-chip component and vertical interconnect component. Then Cadence software is used to set up symbol library, encapsulate library, design principle diagram, design layout and export production data for the reorganized data processing module. The production data mainly include borehole data file and light drawing data file. Finally, the data processing module of 3D multi-chip module is realized by using low-temperature co-fired ceramic technology according to the exported production data.
【學位授予單位】:西安電子科技大學
【學位級別】:碩士
【學位授予年份】:2014
【分類號】:TN957.52
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相關(guān)期刊論文 前2條
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