本文關(guān)鍵詞：用于視頻監(jiān)控平臺(tái)的JPEG2000壓縮系統(tǒng)的FPGA實(shí)現(xiàn)　出處：《華南理工大學(xué)》2014年碩士論文　論文類型：學(xué)位論文

  更多相關(guān)文章： FPGA 提升5/3 Tier1編碼器 Tier2編碼器 JPEG2000 無(wú)損壓縮

【摘要】：在高性能視頻監(jiān)控系統(tǒng)中，考慮到傳輸帶寬、外部存儲(chǔ)空間的限制以及特定場(chǎng)合圖像的無(wú)損獲取，要求采集端對(duì)圖像數(shù)據(jù)能夠無(wú)損壓縮傳輸。本文基于某公司的視頻監(jiān)控處理平臺(tái)，采用FPGA實(shí)現(xiàn)了JPEG2000圖像壓縮系統(tǒng)。主要工作如下： 1、在實(shí)現(xiàn)JPEG2000壓縮系統(tǒng)的FPGA結(jié)構(gòu)上，采用模塊化的設(shè)計(jì)方式把整個(gè)壓縮系統(tǒng)分為預(yù)處理模塊、分量變換模塊、小波變換模塊、系數(shù)量化模塊、Tier1編碼器和Tier2編碼器模塊。 2、在小波變換模塊:根據(jù)實(shí)現(xiàn)無(wú)損壓縮的需求，，采用提升5/3離散小波，并且根據(jù)小波變換中提升系數(shù)的特點(diǎn)，采用映射結(jié)構(gòu)替代通常的乘法運(yùn)算，減少了關(guān)鍵路徑延時(shí)，提升了變換速度；根據(jù)提升步驟的分裂、預(yù)測(cè)和更新特點(diǎn)，利用三級(jí)流水線實(shí)現(xiàn)一維小波變換，優(yōu)化了硬件資源和速度。 3、在編碼器模塊：Tier1模塊包含了位平面編碼和算術(shù)編碼。位平面編碼器的設(shè)計(jì)采用通道并行方案；在算術(shù)編碼器的實(shí)現(xiàn)方式上，采用自適應(yīng)二進(jìn)制算術(shù)編碼和五級(jí)流水線方式，提升了編碼器的效率。在Tier2編碼器模塊，根據(jù)JPEG2000編碼規(guī)則，對(duì)Tier1編碼器輸出的壓縮數(shù)據(jù)進(jìn)行碼流組織；根據(jù)處理平臺(tái)的需求，實(shí)現(xiàn)20:1的壓縮倍數(shù)。 最后，采用Quartus II和ModelSim進(jìn)行編譯和仿真，并在ALTERA公司的Stratix III的驗(yàn)證版上進(jìn)行驗(yàn)證，與MATLAB計(jì)算結(jié)果進(jìn)行比較，實(shí)現(xiàn)了正確的功能。小波變換模塊的最高工作頻率達(dá)到97.64MHZ，F(xiàn)PGA的邏輯資源使用率僅為1%；整個(gè)JPEG2000壓縮系統(tǒng)的工作頻率為89.53MHZ，F(xiàn)PGA邏輯資源使用率為54%，滿足實(shí)際項(xiàng)目中對(duì)1280*720p60Hz圖像20:1的壓縮要求。
[Abstract]:In the high performance video monitoring system , taking into account the transmission bandwidth , the limitation of the external storage space and the lossless acquisition of the special occasion image , it is required that the acquisition end can carry out lossless compression transmission on the image data . Based on the video monitoring and processing platform of a company , the JPEG 2000 image compression system is realized by using FPGA . 1 . The whole compression system is divided into a preprocessing module , a component transformation module , a wavelet transform module , a series quantization module , a Tier 1 encoder and a Tier 2 encoder module by adopting a modular design mode on the FPGA structure of the JPEG 2000 compression system . 2 . In the wavelet transform module : according to the requirement of realizing the lossless compression , a 5 / 3 discrete wavelet is adopted , and a mapping structure is adopted to replace the normal multiplication operation according to the characteristics of the lifting coefficient in the wavelet transform , the delay of the key path is reduced , the conversion speed is improved , and the one - dimensional wavelet transformation is realized by using the three - stage pipeline according to the splitting , prediction and updating characteristics of the lifting step , and the hardware resources and the speed are optimized . 3 . The encoder module comprises a bit plane coding and an arithmetic coding , the design of the bit plane encoder adopts a channel parallel scheme , in the implementation mode of the arithmetic encoder , the coding efficiency of the encoder is improved by adopting an adaptive binary arithmetic coding and a five - stage pipeline mode . Finally , QuartusII and ModelSim are compiled and simulated , and verified by ALTERA company ' s x III verification , and the correct function is realized . The maximum operating frequency of the wavelet transform module is 97.64MHZ , the utilization rate of FPGA is only 1 % , the operating frequency of the whole JPEG 2000 compression system is 89.53MHZ , the utilization rate of FPGA logic resources is 54 % , which can meet the compression requirements of 1280 * 720p60 Hz image 20 : 1 in the actual project .

【學(xué)位授予單位】：華南理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TN948.6;TN919.81

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本文編號(hào)：1395131