【摘要】：在信息時(shí)代,數(shù)據(jù)傳輸系統(tǒng)必須滿足傳輸數(shù)據(jù)速度快,傳送量大的特點(diǎn)。隨著科技的進(jìn)步,工藝尺寸越來越小,電源電壓也越來越低。但是技術(shù)進(jìn)步的同時(shí),很多影響數(shù)據(jù)傳輸速度的不利因素出現(xiàn)了,例如偏斜和串?dāng)_等。普通的并行I/O接口電路受到自身電路結(jié)構(gòu)和傳輸線的限制,已經(jīng)不能滿足不斷發(fā)展的高速微處理器、多媒體以及網(wǎng)絡(luò)技術(shù)的數(shù)據(jù)帶寬要求。為了實(shí)現(xiàn)數(shù)據(jù)的可靠傳輸,采用串行傳輸方式。在串行傳輸中,低電壓小擺幅的方式可實(shí)現(xiàn)數(shù)據(jù)的高速傳輸、低功耗和低成本。 低電壓差分信號(hào)傳輸技術(shù)可以實(shí)現(xiàn)高速度、低功耗數(shù)據(jù)傳輸。LVDS正是一種采用差分信號(hào)串行傳輸?shù)慕涌陔娐?其具有低電壓、小擺幅的優(yōu)點(diǎn),被廣泛應(yīng)用于許多數(shù)據(jù)傳輸電路中。本論文首先對(duì)高速信號(hào)傳輸理論進(jìn)行深入的研究,在此基礎(chǔ)上設(shè)計(jì)了一款應(yīng)用于DSP操作系統(tǒng)的LVDS電路。論文在LVDS接口電路的設(shè)計(jì)中,主要工作歸結(jié)如下: 1)設(shè)計(jì)了一款新型預(yù)加重電路,降低了驅(qū)動(dòng)電路的輸入電容,極大的減少了傳輸線上的信號(hào)衰減,保證了信號(hào)傳輸?shù)目煽啃浴?2)重新設(shè)計(jì)了共模反饋電路,使LVDS驅(qū)動(dòng)器能夠在較高的頻率下正常工作。本共模反饋電路采用無電阻的方式,占用的面積更小,性能更好。 3)對(duì)于接收器的設(shè)計(jì),采用預(yù)放大器、遲滯比較器、整形緩沖模塊結(jié)合的電路結(jié)構(gòu),其具有較寬的共模電壓接收范圍。 4)設(shè)計(jì)了一款新型預(yù)放大器,并且將輸出緩沖電路和電平轉(zhuǎn)換電路合為一體,這種結(jié)構(gòu)縮小了版圖面積,性能更好。 5)設(shè)計(jì)了實(shí)效保護(hù)電路,保證電路運(yùn)行的可靠性。 采用0.18μm CMOS工藝進(jìn)行電路實(shí)現(xiàn),數(shù)據(jù)傳輸速率達(dá)到1Gbps。模擬結(jié)結(jié)果表明,該LVDS接口電路滿足DSP系統(tǒng)應(yīng)用要求。
[Abstract]:In the information age, the data transmission system must meet the characteristics of fast data transmission and large amount of transmission. With the development of science and technology, the process size is smaller and the power supply voltage is lower and lower. But along with the technological progress, many unfavorable factors, such as skew and crosstalk, appear to affect the speed of data transmission. The common parallel I / O interface circuit is limited by its own circuit structure and transmission line, and can not meet the requirements of the data bandwidth of the developing high speed microprocessor, multimedia and network technology. In order to realize the reliable transmission of data, serial transmission is adopted. In serial transmission, low voltage and small swing can achieve high speed data transmission, low power consumption and low cost. Low voltage differential signal transmission technology can realize high speed and low power data transmission. LVDS is a kind of interface circuit which uses differential signal serial transmission, which has the advantages of low voltage and small swing. It is widely used in many data transmission circuits. In this paper, the theory of high speed signal transmission is studied deeply, and a LVDS circuit is designed for DSP operating system. In the design of LVDS interface circuit, the main work is summarized as follows: 1) A new preweighting circuit is designed, which reduces the input capacitance of the drive circuit and greatly reduces the signal attenuation on the transmission line. The reliability of signal transmission is guaranteed. 2) the common-mode feedback circuit is redesigned to make the LVDS driver work normally at higher frequency. The common-mode feedback circuit uses resistive-free mode, occupies a smaller area and better performance. 3) for the design of receiver, the circuit structure of preamplifier, hysteresis comparator and shaping buffer module is adopted, which has a wide common mode voltage receiving range. 4) A new preamplifier is designed, and the output buffer circuit and the level conversion circuit are combined into one. The structure reduces the layout area and the performance is better. 5) the practical protection circuit is designed to ensure the reliability of the circuit. Using 0.18 渭 m CMOS process to realize the circuit, the data transmission rate is 1 Gbps. The simulation results show that the LVDS interface circuit can meet the requirements of DSP system.
【學(xué)位授予單位】：江南大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2012
【分類號(hào)】：TP368.1

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