基于FPGA的SD卡控制器設(shè)計(jì)
發(fā)布時(shí)間：2019-02-12 09:43
【摘要】：SD安全數(shù)字存儲(chǔ)卡(Secure Digital Memory Card,簡(jiǎn)稱SD卡)是目前使用最為廣泛的移動(dòng)存儲(chǔ)設(shè)備之一。SD卡具有小巧輕便、存儲(chǔ)容量大、傳輸數(shù)據(jù)快和數(shù)據(jù)安全性高等優(yōu)點(diǎn),并且SD卡控制器結(jié)構(gòu)簡(jiǎn)單,便于集成,使得SD卡在移動(dòng)媒體設(shè)備和消費(fèi)類電子產(chǎn)品中得到越來(lái)越廣泛的應(yīng)用。SD卡已經(jīng)成為同類存儲(chǔ)產(chǎn)品中的主流,而SD卡控制器作為SD卡工作必不可少的一部分,隨著SD卡的更新?lián)Q代,對(duì)SD卡控制器進(jìn)行研究和優(yōu)化具有很高的實(shí)際應(yīng)用價(jià)值。 本論文首先結(jié)合最新版的SD4.0協(xié)議對(duì)SD存儲(chǔ)卡和SD卡主控制器的相關(guān)協(xié)議規(guī)范做了詳細(xì)介紹,然后對(duì)SD卡控制器的工作原理和總體結(jié)構(gòu)作了詳細(xì)說(shuō)明,著重介紹了SD卡與SD主控制器之間的三種總線連接方式和SD主控制器的結(jié)構(gòu)。從SD卡控制器的總體結(jié)構(gòu)入手,介紹了SD4.0新標(biāo)準(zhǔn)下各模塊的功能,對(duì)其中的幾個(gè)重點(diǎn)模塊：SD_CLK模塊、DMA控制模塊和Tuning控制模塊等進(jìn)行了Verilog HDL設(shè)計(jì),并進(jìn)行了功能仿真、邏輯綜合,同時(shí)對(duì)整個(gè)設(shè)計(jì)進(jìn)行了FPGA驗(yàn)證。 對(duì)SD_CLK模塊進(jìn)行設(shè)計(jì)時(shí),主要利用了Xilinx FPGA特有的數(shù)字時(shí)鐘管理器(DCM)模塊,該模塊不僅可以提供穩(wěn)定的時(shí)鐘,而且還提供了靈活的頻率配置,經(jīng)過(guò)適當(dāng)配置可以提供不同的SD卡正常工作所需的時(shí)鐘頻率。對(duì)DMA控制模塊的邏輯設(shè)計(jì)中,重點(diǎn)設(shè)計(jì)了雙口RAM和RAM的控制部分,細(xì)化讀操作和寫操作,最終完成數(shù)據(jù)在DMA模式下的傳輸。采用Tuning控制模塊是為了使SD卡工作在高頻時(shí),系統(tǒng)時(shí)鐘能夠滿足時(shí)序要求,本模塊的設(shè)計(jì)中提出最佳采樣時(shí)鐘選擇算法,設(shè)計(jì)了合理的狀態(tài)機(jī)對(duì)時(shí)鐘相位進(jìn)行調(diào)整,得到SD卡工作在高頻時(shí)的最佳采樣時(shí)鐘,通過(guò)功能仿真和FPGA邏輯綜合,本模塊的設(shè)計(jì)達(dá)到要求,從而保證了數(shù)據(jù)傳輸?shù)目煽啃浴Ｗ詈髮?duì)整個(gè)設(shè)計(jì)進(jìn)行了FPGA板級(jí)驗(yàn)證,包括對(duì)FPGA開發(fā)板進(jìn)行了簡(jiǎn)要介紹,然后根據(jù)本控制器的設(shè)計(jì)要求進(jìn)行了各項(xiàng)驗(yàn)證,并將幾種不同類型的SD卡分別在本控制器和一般讀卡器上的讀寫速度進(jìn)行了對(duì)比,驗(yàn)證結(jié)果符合設(shè)計(jì)要求。 本論文研究基于最新的SD卡協(xié)議,具有很強(qiáng)的實(shí)際用途,如數(shù)碼相機(jī),手機(jī),筆記本電腦等。本設(shè)計(jì)經(jīng)后端IC部門整合后可以流片出來(lái)投放市場(chǎng)。 值得一提的是,上述工作是本人在凹凸電子(武漢)有限公司開展的,該項(xiàng)目取得了階段性成果。
[Abstract]:SD secure Digital memory Card (Secure Digital Memory Card,) is one of the most widely used mobile storage devices at present. SD card has the advantages of small and light, large storage capacity, fast data transmission and high data security. And SD card controller is simple and easy to integrate, which makes SD card more and more widely used in mobile media devices and consumer electronic products. SD card has become the mainstream of similar storage products. The SD card controller is an indispensable part of the SD card. With the renewal of the SD card, the research and optimization of the SD card controller has a high practical application value. This paper firstly introduces the protocol specification of SD memory card and main controller of SD card with the latest version of SD4.0 protocol, and then explains the working principle and overall structure of SD card controller in detail. Three bus connection modes between SD card and SD master controller and the structure of SD master controller are introduced. Starting with the overall structure of SD card controller, this paper introduces the functions of each module under the new standard of SD4.0, designs several key modules: SD_CLK module, DMA control module and Tuning control module, and carries on the function simulation. Logic synthesis and FPGA verification of the whole design are carried out at the same time. In the design of SD_CLK module, the digital clock manager (DCM) module which is unique to Xilinx FPGA is mainly used. This module not only provides stable clock, but also provides flexible frequency configuration. Properly configured to provide the clock frequency required for the normal operation of different SD cards. In the logic design of DMA control module, the control part of dual-port RAM and RAM is mainly designed to refine the read operation and write operation, and finally complete the data transmission in DMA mode. The Tuning control module is used to make the system clock meet the timing requirements when the SD card works at high frequency. In the design of this module, the optimal sampling clock selection algorithm is proposed, and a reasonable state machine is designed to adjust the clock phase. The optimal sampling clock of SD card working at high frequency is obtained. Through functional simulation and FPGA logic synthesis, the design of this module meets the requirements, thus ensuring the reliability of data transmission. Finally, the FPGA board level verification of the whole design is carried out, including a brief introduction to the FPGA development board, and then each verification is carried out according to the design requirements of the controller. The speed of reading and writing of several different types of SD cards on this controller and general card reader are compared, and the results meet the requirements of the design. Based on the latest SD card protocol, this thesis has strong practical applications, such as digital camera, mobile phone, notebook computer and so on. This design through the back-end IC department integration can flow out of the market. It is worth mentioning that the above-mentioned work in the concave-convex electronics (Wuhan) Co., Ltd., the project has achieved periodic results.
【學(xué)位授予單位】：武漢理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP333;TN791
本文編號(hào)：2420320
[Abstract]:SD secure Digital memory Card (Secure Digital Memory Card,) is one of the most widely used mobile storage devices at present. SD card has the advantages of small and light, large storage capacity, fast data transmission and high data security. And SD card controller is simple and easy to integrate, which makes SD card more and more widely used in mobile media devices and consumer electronic products. SD card has become the mainstream of similar storage products. The SD card controller is an indispensable part of the SD card. With the renewal of the SD card, the research and optimization of the SD card controller has a high practical application value. This paper firstly introduces the protocol specification of SD memory card and main controller of SD card with the latest version of SD4.0 protocol, and then explains the working principle and overall structure of SD card controller in detail. Three bus connection modes between SD card and SD master controller and the structure of SD master controller are introduced. Starting with the overall structure of SD card controller, this paper introduces the functions of each module under the new standard of SD4.0, designs several key modules: SD_CLK module, DMA control module and Tuning control module, and carries on the function simulation. Logic synthesis and FPGA verification of the whole design are carried out at the same time. In the design of SD_CLK module, the digital clock manager (DCM) module which is unique to Xilinx FPGA is mainly used. This module not only provides stable clock, but also provides flexible frequency configuration. Properly configured to provide the clock frequency required for the normal operation of different SD cards. In the logic design of DMA control module, the control part of dual-port RAM and RAM is mainly designed to refine the read operation and write operation, and finally complete the data transmission in DMA mode. The Tuning control module is used to make the system clock meet the timing requirements when the SD card works at high frequency. In the design of this module, the optimal sampling clock selection algorithm is proposed, and a reasonable state machine is designed to adjust the clock phase. The optimal sampling clock of SD card working at high frequency is obtained. Through functional simulation and FPGA logic synthesis, the design of this module meets the requirements, thus ensuring the reliability of data transmission. Finally, the FPGA board level verification of the whole design is carried out, including a brief introduction to the FPGA development board, and then each verification is carried out according to the design requirements of the controller. The speed of reading and writing of several different types of SD cards on this controller and general card reader are compared, and the results meet the requirements of the design. Based on the latest SD card protocol, this thesis has strong practical applications, such as digital camera, mobile phone, notebook computer and so on. This design through the back-end IC department integration can flow out of the market. It is worth mentioning that the above-mentioned work in the concave-convex electronics (Wuhan) Co., Ltd., the project has achieved periodic results.
【學(xué)位授予單位】：武漢理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP333;TN791
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