【摘要】：航天技術是當今世界競爭最激烈、發(fā)展最迅速的領域之一,并代表著國家科技實力和綜合國力。隨著航天技術的飛速發(fā)展,電子設備在航天器中的應用越來越普遍。因此,處于空間輻射環(huán)境中的電子設備在輻射作用下,元器件會發(fā)生單粒子效應,以至于電子設備不能正常工作�？臻g輻射對半導體材料及器件的影響最為強烈,而且隨著工藝尺寸的縮減,半導體器件對單粒子效應的敏感度增加,新的加固技術的研究勢在必行。單粒子效應最基本的加固方法就是抑制敏感節(jié)點對電荷的收集量。PMOS管的電荷收集機理包括載流子的漂移運動、擴散運動和寄生雙極效應。其中PMOS管的寄生雙擊效應對敏感節(jié)點的電荷收集起主要作用。有效的加固技術可以考慮抑制寄生雙極效應,從而減少敏感節(jié)點對電荷的收集量。有學者提出了源極隔離加固技術,源極隔離加固技術能夠有效抑制寄生雙極效應。本文首先將標準單元敏感面積作為評價指標,分析了源極隔離技術的加固效果;其次研究了源極隔離技術的性能開銷;然后研究了工藝尺寸縮減對源極隔離加固效果的影響;最后研究了源極隔離加固技術在SRAM單元中的應用。取得的主要成果如下:1)基于180nm體硅雙阱工藝,以標準單元的敏感面積和SET脈沖寬度為評價指標,研究了源極隔離技術的加固效果。三維混合模擬結果顯示,采用源極隔離技術后,標準單元的敏感面積顯著減小。2)分別以標準單元的敏感面積和SET脈沖寬度為評價指標,研究了源極隔離加固效果隨工藝縮減的變化。三維混合模擬結果表明,當工藝尺寸從180nm縮減到65nm時,源極隔離技術的加固效果會逐漸減弱,這主要歸因于源極隔離版圖結構中寄生雙極晶體管的電流增益隨著工藝尺寸的縮減而增加。三維模擬結果還顯示源極隔離版圖結構中SET脈沖寬度隨著N-Well接觸距離的增加而增加,隨著N-Well接觸面積的增加而減小,隨著溫度的升高而變寬。通過適當增加N-Well接觸面積可以增強源極隔離技術的加固效果。3)研究了源極隔離加固技術在SRAM單元中的應用。三維混合模擬結果表明,采用源極隔離技術后,SRAM單元的敏感面積有一定程度的減小。
[Abstract]:Aerospace technology is one of the most competitive and rapidly developing fields in the world, and represents the national scientific and technological strength and comprehensive national strength. With the rapid development of space technology, the application of electronic equipment in spacecraft is becoming more and more common. Therefore, the electronic devices in the space radiation environment will have a single particle effect under the radiation, so that the electronic devices can not work properly. The influence of space radiation on semiconductor materials and devices is most intense, and with the reduction of process size, the sensitivity of semiconductor devices to single particle effect increases, so it is imperative to study new reinforcement technology. The most basic method of single particle effect is to suppress the charge collection at sensitive nodes. The charge collection mechanism of PMOS tube includes the drift motion of carrier diffusion motion and parasitic bipolar effect. The parasitic double-click effect of PMOS tube plays an important role in charge collection of sensitive nodes. The effective reinforcement technique can reduce the charge collection by reducing the parasitic bipolar effect. Some scholars have proposed the source pole isolation reinforcement technology, which can effectively suppress parasitic bipolar effect. In this paper, the sensitive area of the standard element is taken as the evaluation index, and the reinforcement effect of the source pole isolation technology is analyzed, then the performance cost of the source pole isolation technology is studied, and the effect of the process size reduction on the source pole isolation reinforcement effect is studied. Finally, the application of pole isolation reinforcement technology in SRAM element is studied. The main results are as follows: 1) based on the 180nm bulk silicon double well technology, the reinforcement effect of the source pole isolation technique is studied with the sensitive area of the standard cell and the width of the SET pulse as the evaluation index. The results of 3D hybrid simulation show that the sensitive area of the standard cell is significantly reduced by using the source pole isolation technique. 2) the sensitive area of the standard cell and the width of the SET pulse are taken as the evaluation indexes, respectively. The effect of pole isolation and reinforcement is studied. The results of 3D mixing simulation show that when the process size is reduced from 180nm to 65nm, the reinforcement effect of the source pole isolation technique will gradually weaken. This is mainly due to the increase of the current gain of parasitic bipolar transistors in the source isolated layout with the decrease of process size. The 3D simulation results also show that the width of SET pulse increases with the increase of N-Well contact distance, decreases with the increase of N-Well contact area, and widens with the increase of temperature. The reinforcement effect of source pole isolation technology can be enhanced by increasing N-Well contact area properly. 3) the application of source pole isolation reinforcement technology in SRAM element is studied. The results of 3D hybrid simulation show that the sensitive area of SRAM element decreases to a certain extent after the use of source pole isolation technology.
【學位授予單位】：國防科學技術大學
【學位級別】：碩士
【學位授予年份】：2013
【分類號】：V443;TP333
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本文編號：2387318