基于雙平面技術(shù)的固態(tài)存儲器的設(shè)計與實現(xiàn)
發(fā)布時間:2018-11-05 12:52
【摘要】:作為測控系統(tǒng)的重要組成部分,固態(tài)存儲器在測控系統(tǒng)中有著不可替代的作用,它是獲得飛行器飛行狀況信息的主要途徑,為飛行器系統(tǒng)的性能評定、故障分析和設(shè)計生產(chǎn)改進提供可靠的試驗依據(jù)。本文設(shè)計和實現(xiàn)的固態(tài)存儲器完成模擬量的采集和數(shù)字量的接收,并將接收的數(shù)據(jù)存儲。在試驗完成以后,可以將固態(tài)存儲器進行硬回收,將存儲器存儲的數(shù)據(jù)讀出以作后期的分析和處理。 針對基于雙平面技術(shù)的固態(tài)存儲器,根據(jù)模塊化和高可靠性的設(shè)計思想,結(jié)合固態(tài)存儲器的任務(wù)要求和性能指標(biāo),本文提出了固態(tài)存儲器的總體設(shè)計原則和設(shè)計方案,,并主要完成了以下工作: (1)以FPGA為控制核心,完成6路模擬量的采集和2路PCM碼流的接收,將采集的模擬量和接收的數(shù)字量進行再編碼,并將再編碼后的數(shù)據(jù)進行混合編幀。 (2)詳細介紹了使用雙平面技術(shù)進行塊擦除、將混合編幀的數(shù)據(jù)進行頁編程和在時候?qū)?shù)據(jù)回讀的時序,并對雙平面技術(shù)在固態(tài)存儲器中的應(yīng)用作了相關(guān)的驗證。 (3)介紹了試驗中進行實時監(jiān)測以及在試驗完成后,如何使用LVDS通訊接口將實時監(jiān)測數(shù)據(jù)和試驗記錄的數(shù)據(jù)發(fā)送到地面設(shè)備以分析和處理。 本文最后對固態(tài)存儲器進行了功能測試和性能驗證,并對試驗結(jié)果進行分析和處理。同時,根據(jù)高可靠性的要求,提出了灌封和緩沖防護、環(huán)境應(yīng)力篩選試驗等保障措施。系統(tǒng)測試結(jié)果表明,固態(tài)存儲器性能良好、可靠性高,并且完全符合任務(wù)設(shè)計要求。
[Abstract]:As an important part of the measurement and control system, solid state memory plays an irreplaceable role in the measurement and control system. It is the main way to obtain the flight status information of the aircraft and evaluate the performance of the aircraft system. Fault analysis and design and production improvement provide reliable test basis. The solid state memory designed and implemented in this paper completes the acquisition of analog signals and the reception of digital quantities, and stores the received data. After the experiment is completed, the solid state memory can be hard-recovered and the data stored in the memory can be read out for later analysis and processing. According to the design idea of modularization and high reliability, combined with the task requirement and performance index of solid-state memory, this paper puts forward the general design principle and design scheme of solid-state memory based on biplane technology. The main works are as follows: (1) taking FPGA as the control core, the acquisition of six analog signals and the reception of two PCM streams are completed, and the collected analog quantity and the received digital quantity are recoded. And reencode the data for mixed framing. (2) this paper introduces the timing of block erasure using biplane technique, page programming of mixed framing data and reading back data in time, and verifies the application of biplane technology in solid state memory. (3) this paper introduces the real-time monitoring in the experiment and how to use the LVDS communication interface to transmit the real-time monitoring data and the recorded data to the ground equipment for analysis and processing after the test is completed. Finally, the function test and performance verification of solid state memory are carried out, and the experimental results are analyzed and processed. At the same time, according to the requirement of high reliability, the safeguard measures such as filling and buffer protection, environmental stress screening test and so on are put forward. The system test results show that the solid state memory has good performance, high reliability and meets the requirements of task design.
【學(xué)位授予單位】:中北大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2012
【分類號】:TP333
本文編號:2312144
[Abstract]:As an important part of the measurement and control system, solid state memory plays an irreplaceable role in the measurement and control system. It is the main way to obtain the flight status information of the aircraft and evaluate the performance of the aircraft system. Fault analysis and design and production improvement provide reliable test basis. The solid state memory designed and implemented in this paper completes the acquisition of analog signals and the reception of digital quantities, and stores the received data. After the experiment is completed, the solid state memory can be hard-recovered and the data stored in the memory can be read out for later analysis and processing. According to the design idea of modularization and high reliability, combined with the task requirement and performance index of solid-state memory, this paper puts forward the general design principle and design scheme of solid-state memory based on biplane technology. The main works are as follows: (1) taking FPGA as the control core, the acquisition of six analog signals and the reception of two PCM streams are completed, and the collected analog quantity and the received digital quantity are recoded. And reencode the data for mixed framing. (2) this paper introduces the timing of block erasure using biplane technique, page programming of mixed framing data and reading back data in time, and verifies the application of biplane technology in solid state memory. (3) this paper introduces the real-time monitoring in the experiment and how to use the LVDS communication interface to transmit the real-time monitoring data and the recorded data to the ground equipment for analysis and processing after the test is completed. Finally, the function test and performance verification of solid state memory are carried out, and the experimental results are analyzed and processed. At the same time, according to the requirement of high reliability, the safeguard measures such as filling and buffer protection, environmental stress screening test and so on are put forward. The system test results show that the solid state memory has good performance, high reliability and meets the requirements of task design.
【學(xué)位授予單位】:中北大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2012
【分類號】:TP333
【引證文獻】
相關(guān)期刊論文 前1條
1 羅振貴;鄭永秋;李圣昆;;固態(tài)記錄器在遙測數(shù)據(jù)回收中的應(yīng)用研究[J];現(xiàn)代電子技術(shù);2013年07期
本文編號:2312144
本文鏈接:http://sikaile.net/kejilunwen/jisuanjikexuelunwen/2312144.html
最近更新
教材專著