【摘要】：隨著數(shù)字技術(shù)和網(wǎng)絡(luò)技術(shù)的不斷發(fā)展，具有高清視頻功能的電子產(chǎn)品已經(jīng)進(jìn)入我們的生活，高清視頻在數(shù)字視頻領(lǐng)域逐漸占據(jù)主導(dǎo)地位。然而，海量數(shù)據(jù)帶來的存儲和網(wǎng)絡(luò)傳輸?shù)葐栴}使高清晰視頻技術(shù)的應(yīng)用受到了限制，因此，如何在保證視頻質(zhì)量的前提下獲得高的壓縮比成為數(shù)字視頻領(lǐng)域研究的熱點(diǎn)。 本文根據(jù)系統(tǒng)設(shè)計(jì)的需求出發(fā)，以TI公司的DaVinci處理器TMS320DM368為核心實(shí)現(xiàn)基于H.264的1080P高清視頻壓縮的功能。本文主要完成的工作包括系統(tǒng)的板級電路設(shè)計(jì)、調(diào)試以及嵌入式系統(tǒng)軟件的開發(fā)。 首先選定以TI公司新一代達(dá)芬奇處理器TMS320DM368作為核心處理芯片，圍繞TMS320DM368給出了嵌入式壓縮系統(tǒng)的設(shè)計(jì)方案，然后分析了H.264編碼結(jié)構(gòu)并提出了一種基于塊匹配的快速運(yùn)動估計(jì)算法。 本文將整個(gè)系統(tǒng)分為：視頻數(shù)據(jù)輸入模塊、通信模塊、核心處理模塊以及電源模塊四個(gè)部分。視頻數(shù)據(jù)輸入模塊是以Altera公司的CycloneⅡ系列FPGA為核心，主要完成對視頻數(shù)據(jù)進(jìn)行格式轉(zhuǎn)換以滿足對TMS320DM368的輸入數(shù)據(jù)要求，實(shí)現(xiàn)了高清視頻的模擬；通信模塊包括10/100M以太網(wǎng)和串口通信兩個(gè)部分；核心處理模塊是針對TMS320DM368做的一些外圍電路設(shè)計(jì)，包括時(shí)鐘電路設(shè)計(jì)、JTAG電路設(shè)計(jì)、DDR2SDRAM電路設(shè)計(jì)、Nand FLASH電路設(shè)計(jì)以及系統(tǒng)啟動等幾個(gè)部分；電源模塊完成對各個(gè)部分的供電。對于每個(gè)部分，本文都給出了設(shè)計(jì)的原理。 在軟件方面主要分析了嵌入式Linux下的Bootloader啟動過程，以TI公司的DVSDK軟件開發(fā)包為平臺，分析了啟動引導(dǎo)代碼、U-Boot源碼以及內(nèi)核配置與編譯，最終完成了嵌入式系統(tǒng)U-Boot和Linux內(nèi)核的移植。 本文最后對所做的一系列工作進(jìn)行了總結(jié)并討論日后的研究方向。
[Abstract]:With the development of digital technology and network technology, the electronic products with high-definition video function have entered our lives, and high-definition video has gradually occupied the leading position in the field of digital video. However, the application of high-definition video technology is limited by the storage and network transmission of mass data. Therefore, how to obtain high compression ratio under the premise of ensuring video quality has become a hot topic in the field of digital video. According to the requirement of the system design, this paper realizes the 1080P high-definition video compression function based on H.264 with the DaVinci processor TMS320DM368 of TI Company as the core. The main work of this paper includes board level circuit design, debugging and the development of embedded system software. In this paper, the new Da Vinci processor TMS320DM368 of TI Company is selected as the core processing chip, and the design scheme of embedded compression system is given around TMS320DM368. Then, the coding structure of H.264 is analyzed and a fast motion estimation algorithm based on block matching is proposed. The whole system is divided into four parts: video data input module, communication module, core processing module and power module. The video data input module is based on the Cyclone 鈪，

本文編號：2274378