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面向高性能應(yīng)用的PCIE SSD的驅(qū)動(dòng)研究與實(shí)現(xiàn)

發(fā)布時(shí)間:2018-09-01 13:18
【摘要】:隨著大數(shù)據(jù)時(shí)代的到來(lái),企業(yè)和用戶對(duì)存儲(chǔ)領(lǐng)域的需求呈現(xiàn)爆炸式增長(zhǎng)。當(dāng)前數(shù)據(jù)已經(jīng)成為企業(yè)的核心資源,因此對(duì)數(shù)據(jù)存儲(chǔ)的安全性和可靠性也提出了更高要求。這些技術(shù)從軟件或硬件等不同層面共同推動(dòng)了存儲(chǔ)領(lǐng)域的發(fā)展,也對(duì)傳統(tǒng)的存儲(chǔ)體系結(jié)構(gòu)形成了沖擊,從而為相關(guān)的研究提供了廣闊的空間。 為了滿足數(shù)據(jù)密集型海量存儲(chǔ)系統(tǒng)的應(yīng)用需求,進(jìn)一步提高存儲(chǔ)系統(tǒng)的帶寬,目前已經(jīng)研發(fā)出了基于PCIe接口的SSD。本文針對(duì)自主研制的PCIe SSD設(shè)備,設(shè)計(jì)實(shí)現(xiàn)了分層驅(qū)動(dòng)程序。通過(guò)兩層驅(qū)動(dòng)的配合,正確將PCIe SSD掛載為系統(tǒng)中磁盤(pán),并且有效提高了系統(tǒng)帶寬和空間利用率。本文主要工作有以下幾個(gè)方面: 1)設(shè)計(jì)并實(shí)現(xiàn)了PCIe SSD的Windows驅(qū)動(dòng),包括研究Windows操作系統(tǒng)存儲(chǔ)驅(qū)動(dòng)棧的工作原理、WDM驅(qū)動(dòng)框架工作機(jī)制。整個(gè)驅(qū)動(dòng)采用了分層框架,上層驅(qū)動(dòng)將硬件設(shè)備正確注冊(cè)為Windows操作系統(tǒng)中的磁盤(pán)設(shè)備,采取了與傳統(tǒng)驅(qū)動(dòng)設(shè)計(jì)不同的通路,降低了協(xié)議轉(zhuǎn)換的開(kāi)銷;下層驅(qū)動(dòng)中采用了請(qǐng)求隊(duì)列、中斷聚合、請(qǐng)求TAG寄存器技術(shù)以處理并發(fā)亂序請(qǐng)求。通過(guò)兩層驅(qū)動(dòng)協(xié)作,共同提高系統(tǒng)性能。 2)提出了面向大容量FTL的閃存轉(zhuǎn)換層機(jī)制,制定了基于進(jìn)程的塊分配策略。實(shí)驗(yàn)證明:在驅(qū)動(dòng)層實(shí)現(xiàn)FTL可以有效利用主機(jī)的大內(nèi)存空間,基于進(jìn)程的塊分配策略可以更加有效地管理閃存,提高垃圾回收的效率和閃存的性能。 3)在驅(qū)動(dòng)層中采用了緩存策略,有效解決了文件系統(tǒng)與磁盤(pán)設(shè)備讀寫(xiě)粒度不同的矛盾,進(jìn)一步減少了閃存的擦除次數(shù),提高了響應(yīng)速度和垃圾回收的性能。 4)研究了高速傳輸?shù)南嚓P(guān)機(jī)制,采用了請(qǐng)求隊(duì)列、中斷聚合、請(qǐng)求TAG寄存器技術(shù)以處理并發(fā)亂序請(qǐng)求。充分利用了PCIe接口的高速帶寬,,減少了系統(tǒng)響應(yīng)中斷的次數(shù),并且使亂序處理情況下的各請(qǐng)求得到了正確響應(yīng)。
[Abstract]:With the arrival of big data era, the demand of enterprises and users for storage field presents explosive growth. At present, data has become the core resource of enterprises, so the security and reliability of data storage are also required. These technologies promote the development of storage field from different aspects such as software or hardware, and also impact the traditional storage architecture, thus providing a broad space for related research. In order to meet the application requirements of data intensive mass storage system and further improve the bandwidth of storage system, a SSD. based on PCIe interface has been developed. In this paper, a layered driver is designed and implemented for the self-developed PCIe SSD device. Through the cooperation of two layers drive, the PCIe SSD is mounted as the disk of the system correctly, and the system bandwidth and space utilization are improved effectively. The main work of this paper is as follows: 1) the Windows driver of PCIe SSD is designed and implemented, including the working principle of the storage driver stack of Windows operating system and the working mechanism of Windows driver framework. The whole driver adopts a layered framework, the upper driver registers the hardware device as the disk device in Windows operating system correctly, and adopts a different path from the traditional driver design, which reduces the overhead of protocol conversion. In the lower driver, request queue, interrupt aggregation and request TAG register technology are used to deal with concurrent disordered requests. Through two-layer driven collaboration, the system performance is improved. 2) A flash memory conversion layer mechanism for large capacity FTL is proposed, and a process-based block allocation strategy is proposed. Experiments show that the implementation of FTL in the driver layer can effectively utilize the large memory space of the host, and the block allocation strategy based on process can manage flash memory more effectively. Improve the efficiency of garbage collection and the performance of flash memory. 3) the buffer strategy is adopted in the driver layer, which effectively solves the conflict between file system and disk device in reading and writing granularity, and further reduces the erasure times of flash memory. The response speed and the performance of garbage collection are improved. 4) the related mechanism of high speed transmission is studied. Request queue, interrupt aggregation and request TAG register technology are used to deal with concurrent out-of-order requests. The high speed bandwidth of the PCIe interface is fully utilized to reduce the number of interruptions in the system response, and the requests in the case of chaotic processing are correctly responded to.
【學(xué)位授予單位】:國(guó)防科學(xué)技術(shù)大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2012
【分類號(hào)】:TP333;TP309

【參考文獻(xiàn)】

相關(guān)期刊論文 前2條

1 徐小玲;IDE接口硬盤(pán)讀寫(xiě)技術(shù)[J];電子科技大學(xué)學(xué)報(bào);2002年06期

2 鄭文靜;李明強(qiáng);舒繼武;;Flash存儲(chǔ)技術(shù)[J];計(jì)算機(jī)研究與發(fā)展;2010年04期



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