【摘要】：加速未來大規(guī)�？茖W(xué)計算的一種趨勢是使用異構(gòu)多核／眾核系統(tǒng)。然而,相對于硬件系統(tǒng)的飛速發(fā)展,軟件并行編程模型,特別是針對異構(gòu)多核平臺的并行模型發(fā)展相對滯后。如何在異構(gòu)多核環(huán)境下充分利用硬件提供的并行計算能力,提高并行計算執(zhí)行效率,成為當(dāng)前并行編程工作的首要任務(wù)。 為解決這一問題,本文提出了一種適用于異構(gòu)多核系統(tǒng)的并行計算模型MS-BSP,與傳統(tǒng)的通用BSP并行計算模型相比,可以更好地反映不同類型的任務(wù)分配到不同類型的處理器核并行處理的特征,指導(dǎo)在此類異構(gòu)多核系統(tǒng)上的并行科學(xué)計算算法的設(shè)計和分析。在此種模型下,本文提出科學(xué)計算并行化編程框架。與IBM的Cell和Nvidia的CUDA架構(gòu)下復(fù)雜的編程方式相比,MS-BSP模型下的編程方式將多線程的核函數(shù)映射工作交由系統(tǒng)自行完成,減少了開發(fā)人員對存儲單元和同步機(jī)制的繁瑣的顯式操作,方便了編程。最后,本文在RED平臺上按照MPI規(guī)范實現(xiàn)了并行編程與操作系統(tǒng)的接口,完成了對MPI函數(shù)的兼容,提高了所提出并行編程模型的可移植性。 在此套并行化框架指引下,將科學(xué)計算應(yīng)用領(lǐng)域中的六種核心算法進(jìn)行并行化設(shè)計和優(yōu)化,并在“浙大數(shù)芯”實驗室設(shè)計開發(fā)的RED片上多核平臺和IBM的成熟商業(yè)處理器Cell平臺上進(jìn)行實現(xiàn)和對比評估,驗證了我們提出的并行計算模型的實用性以及高效性,最終六個算法在兩個平臺上都達(dá)到了較高性能。由于MS-BSP模型在RED平臺上針對其主從式異構(gòu)多核架構(gòu)進(jìn)行優(yōu)化,使得任務(wù)調(diào)度開銷顯著減小,其實現(xiàn)效率(效率定義為并行加速比與實際加速核數(shù)目的比值)不低于75.67%,而在已有的Cell平臺上,其實現(xiàn)效率不低于63.91%。
[Abstract]:However, compared with the rapid development of hardware systems, the development of software parallel programming models, especially for heterogeneous multi-core platforms, is lagging behind. How to make full use of the parallel computing capabilities provided by hardware in heterogeneous multi-core environments? Improving the efficiency of parallel computing has become the primary task of parallel programming.
To solve this problem, this paper proposes a parallel computing model MS-BSP for heterogeneous multi-core systems. Compared with the traditional BSP parallel computing model, it can better reflect the characteristics of different types of tasks assigned to different types of processor cores for parallel processing, and guide the parallel scientific design on such heterogeneous multi-core systems. In this model, a parallel programming framework for scientific computing is proposed. Comparing with the complex programming methods of Clell and Nvidia's CUDA architecture of IBM, the programming method of MS-BSP model transfers the multi-threaded kernel function mapping to the system itself, which reduces the number of developers working on storage units and synchronizers. Finally, this paper implements the interface between parallel programming and operating system according to MPI specification on RED platform, completes the compatibility of MPI functions and improves the portability of the proposed parallel programming model.
Under the guidance of this parallelization framework, six core algorithms in the field of scientific computing applications are designed and optimized in parallel, and implemented and compared on the RED chip multi-core platform designed and developed by Zhejiang University Digital Core Laboratory and the mature commercial processor Cell platform of IBM. The proposed parallel computing model is validated. As the MS-BSP model is optimized for its master-slave heterogeneous multi-core architecture on the RED platform, the task scheduling overhead is significantly reduced, and the implementation efficiency (defined as the ratio of parallel acceleration ratio to the actual number of accelerated cores) is no less than 75%. .67%, and on the existing Cell platform, the actual efficiency is no less than 63.91%.
【學(xué)位授予單位】：浙江大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2012
【分類號】：TP332

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本文編號：2199751