一種針對(duì)NAND Flash的緩存管理算法研究
發(fā)布時(shí)間:2018-05-16 15:29
本文選題:固態(tài)硬盤 + NAND; 參考:《國(guó)防科學(xué)技術(shù)大學(xué)》2012年碩士論文
【摘要】:基于NAND flash的固態(tài)硬盤在訪問(wèn)速度、功耗和抗震性等方面比機(jī)械硬盤具有更多優(yōu)勢(shì)。但由于擦塊寫頁(yè)、擦寫次數(shù)有限和讀寫擦代價(jià)不對(duì)稱性等特點(diǎn),使得其在小數(shù)據(jù)隨機(jī)寫情況下性能會(huì)明顯下降。特別是在多通道并發(fā)架構(gòu)下,過(guò)多的擦除操作嚴(yán)重威脅著固態(tài)硬盤的性能和壽命,緩存管理對(duì)于改善這方面的性能具有重要作用。 本文根據(jù)現(xiàn)有FAB、CLC等塊級(jí)緩存置換算法和頁(yè)填充策略,分析了其基本思路和優(yōu)缺點(diǎn)。對(duì)緩存管理算法中的緩存置換算法和頁(yè)填充策略分別進(jìn)行了改進(jìn),,結(jié)合NAND Flash的操作特點(diǎn)和當(dāng)前多通道并發(fā)架構(gòu)的要求,設(shè)計(jì)了一種新的緩存管理算法。本文的主要研究成果如下: (1)在CLC置換算法的基礎(chǔ)上,設(shè)計(jì)了基于動(dòng)態(tài)駐留優(yōu)先級(jí)的緩存置換算法。不同于通過(guò)固定的鏈表長(zhǎng)度實(shí)現(xiàn)數(shù)據(jù)駐留優(yōu)先級(jí)的變化,本文以最近訪問(wèn)距離為閾值判定熱數(shù)據(jù)是否應(yīng)降為冷數(shù)據(jù)。圍繞該思想,設(shè)計(jì)了與之相適應(yīng)的頁(yè)簇狀態(tài)、雙鏈表維護(hù)、置換對(duì)象的選擇等內(nèi)容。仿真和測(cè)試證明,該改進(jìn)使得對(duì)數(shù)據(jù)“價(jià)值”的評(píng)價(jià)更加準(zhǔn)確,能夠提高命中率,減少擦除次數(shù)。 (2)在單閾值的頁(yè)填充策略的基礎(chǔ)上,設(shè)計(jì)了一種基于雙閾值的頁(yè)填充策略。不同于單閾值的頁(yè)填充策略,根據(jù)部分頁(yè)填充和全頁(yè)填充對(duì)實(shí)時(shí)性影響的不同,設(shè)定雙閾值判定二者執(zhí)行的時(shí)機(jī)。基于這一思想,對(duì)部分頁(yè)填充和全頁(yè)填充分別在緩存環(huán)節(jié)和垃圾回收環(huán)節(jié)的時(shí)間開銷進(jìn)行了分析,推導(dǎo)出合適的閾值表達(dá)式,并通過(guò)仿真給出了閾值的具體值。仿真和測(cè)試證明,該改進(jìn)能夠進(jìn)一步提高吞吐量。 最后將基于動(dòng)態(tài)駐留優(yōu)先級(jí)的緩存置換算法和基于雙閾值的頁(yè)填充策略整合為一個(gè)緩存管理算法,并在基于多通道并發(fā)架構(gòu)的硬件平臺(tái)上進(jìn)行了性能測(cè)試。測(cè)試結(jié)果表明該算法在小數(shù)據(jù)隨機(jī)寫情況下能夠改善系統(tǒng)性能。
[Abstract]:Solid state hard disk based on NAND flash has more advantages than mechanical hard disk in access speed, power consumption and seismic resistance. However, due to the characteristics of block writing, limited erasing times and asymmetry of the cost of reading and writing, the performance of small data random writing will be significantly decreased. Especially in multi-channel concurrent architecture, too much erasure is a serious threat to the performance and lifetime of solid-state hard disk. Cache management plays an important role in improving the performance of this aspect. Based on the existing block level cache replacement algorithms and page filling strategies, this paper analyzes their basic ideas, advantages and disadvantages. The cache replacement algorithm and the page-filling strategy in the cache management algorithm are improved respectively. A new cache management algorithm is designed according to the operation characteristics of NAND Flash and the requirements of the current multi-channel concurrent architecture. The main research results of this paper are as follows: 1) based on the CLC permutation algorithm, a cache permutation algorithm based on dynamic resident priority is designed. Different from the change of data dwell priority by a fixed length of linked list, this paper uses the nearest access distance as the threshold to determine whether the hot data should be reduced to cold data. According to this idea, the corresponding page cluster state, double linked list maintenance, replacement object selection and so on are designed. The simulation and test show that the improved method makes the evaluation of data "value" more accurate, and can improve the hit ratio and reduce the erasure times. 2) based on the single threshold page-filling strategy, a double-threshold page-filling strategy is designed. Different from the single threshold page-filling strategy, according to the effect of partial page-filling and full-page-filling on real-time performance, two thresholds are set to determine the timing of their execution. Based on this idea, the time cost of partial page filling and full page filling in cache and garbage collection are analyzed, and the appropriate threshold expression is deduced, and the specific value of threshold is given by simulation. Simulation and test show that the improvement can further improve the throughput. Finally, the cache replacement algorithm based on dynamic resident priority and the page-filling strategy based on double threshold are integrated into a cache management algorithm, and the performance is tested on the hardware platform based on multi-channel concurrency architecture. The test results show that the algorithm can improve the system performance in the case of small data random writing.
【學(xué)位授予單位】:國(guó)防科學(xué)技術(shù)大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2012
【分類號(hào)】:TP333
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