本文選題：FPGA + MCU�。� 參考：《西安電子科技大學(xué)》2013年碩士論文

【摘要】：隨著科技的進(jìn)步和電子信息技術(shù)的不斷發(fā)展，MCU在越來(lái)越多的領(lǐng)域中被使用。但是MCU自身并不具備二次開(kāi)發(fā)功能，需要借助相應(yīng)的硬件開(kāi)發(fā)平臺(tái)和編譯調(diào)試軟件來(lái)對(duì)MCU進(jìn)行二次開(kāi)發(fā)。MCU仿真器就是這樣一套完整的開(kāi)發(fā)系統(tǒng)。 本文設(shè)計(jì)了一款基于FPGA的可用于多芯片的MCU仿真器，可以對(duì)課題組現(xiàn)有自主研發(fā)的MCU內(nèi)核（如RISC-I和6502）的寄存器內(nèi)容進(jìn)行實(shí)時(shí)顯示與更改，實(shí)現(xiàn)基本的二次開(kāi)發(fā)。硬件平臺(tái)基于Xilinx的XC3S700AN FPGA芯片及Cypress68013USB芯片。軟件平臺(tái)基于Xilinx ISE開(kāi)發(fā)套件和由課題組自主開(kāi)發(fā)的可視化仿真軟件CASUEEmu。為了保證MCU仿真器與主機(jī)的兼容性，仿真器的數(shù)據(jù)通信和供電都使用了高速USB2.0接口，給出了通過(guò)68013USB芯片實(shí)現(xiàn)FPGA開(kāi)發(fā)板USB2.0通信接口的詳細(xì)設(shè)計(jì)過(guò)程。本文還利用IP核建立了寄存器模塊，并設(shè)計(jì)了一個(gè)實(shí)時(shí)讀寫狀態(tài)機(jī)，從而實(shí)現(xiàn)主機(jī)直接通過(guò)USB2.0接口讀寫寄存器內(nèi)容，令用戶可以通過(guò)CASUEEmu開(kāi)發(fā)軟件實(shí)時(shí)顯示與更改MCU的寄存器。同時(shí)，為了實(shí)現(xiàn)對(duì)多款MCU的仿真支持，本文還設(shè)計(jì)了支持多芯片的讀寫數(shù)據(jù)協(xié)議，，并通過(guò)在FPGA中編寫數(shù)據(jù)處理模塊實(shí)現(xiàn)了對(duì)該協(xié)議的支持。最后，主機(jī)能夠按照定制的數(shù)據(jù)讀寫協(xié)議通過(guò)USB2.0接口對(duì)MCU的寄存器內(nèi)容進(jìn)行實(shí)時(shí)顯示和更改，MCU通用仿真器達(dá)到設(shè)計(jì)目標(biāo)。
[Abstract]:With the development of technology and electronic information technology, MCU is used in more and more fields. However, MCU itself does not have the function of secondary development. It needs the corresponding hardware development platform and compiling and debugging software to redevelop MCU. MCU simulator is such a complete development system. A multi-chip MCU simulator based on FPGA is designed in this paper. It can display and change the register contents of the existing MCU kernel (such as RISC-I and 6502) developed by our research group in real time, and realize the basic secondary development. The hardware platform is based on XC3S700AN FPGA chip and Cypress68013USB chip of Xilinx. The software platform is based on the Xilinx ISE development suite and the visual simulation software CASUEEmu. developed by the research group. In order to ensure the compatibility between the MCU simulator and the host computer, the high-speed USB2.0 interface is used in the data communication and power supply of the simulator. The detailed design process of the USB2.0 communication interface of the FPGA development board through the 68013USB chip is given. This paper also establishes register module with IP core, and designs a real-time read and write state machine, so that the host computer can read and write register contents directly through USB2.0 interface, so that users can display and change the register of MCU in real time through CASUEEmu development software. At the same time, in order to achieve the simulation support for multiple MCU, this paper also designed a multi-chip read-write data protocol, and implemented the protocol by writing data processing module in FPGA. Finally, the host computer can display the register content of MCU through USB2.0 interface according to the customized data read and write protocol and change the universal simulator of MCU to achieve the design goal.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP337

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