本文選題：FPGA + 圖像處理　； 參考：《中南民族大學(xué)》2013年碩士論文

【摘要】：數(shù)字圖像處理技術(shù)在人們?nèi)粘Ｉa(chǎn)生活、國家安全等方面有著廣泛的應(yīng)用。傳統(tǒng)的數(shù)字圖像顯示系統(tǒng)多基于ARM或是DSP器件實現(xiàn)。這些方式對于圖像數(shù)據(jù)量大，顯示實時性要求高的應(yīng)用上表現(xiàn)不好，功耗和體積大，運行不穩(wěn)定，因此整體的性能不太理想。本設(shè)計采用的FPGA器件本身有著內(nèi)嵌的微處理器和DSP塊，大量的可配置硬邏輯。無論是浮點處理、帶寬、并行性、實時性相比前者都有顯著的優(yōu)點。因此采用FPGA實現(xiàn)的圖像處理系統(tǒng)將更具優(yōu)點。 論文采用的方法是使用sparten6主芯片結(jié)合SD卡存儲芯片和LCD顯示器件。詳細(xì)實現(xiàn)該系統(tǒng)中的SD卡控制器模塊，SPI協(xié)議模塊，圖像解碼模塊，乒乓操作FIFO模塊，DDR控制器模塊，F(xiàn)AT16的文件結(jié)構(gòu)，VGA顯示模塊。完整的實現(xiàn)了基于SD卡存儲的數(shù)字圖像的處理顯示系統(tǒng)。采用HDL編碼和調(diào)用IP核的方式，實現(xiàn)了高清圖像的實時動態(tài)顯示。相比基于軟件的實現(xiàn)方式在處理速度，兼容性和擴展性上更具有優(yōu)勢。 基于FPGA的實現(xiàn)方式充分利用其內(nèi)嵌的豐富的硬件資源和RAM查找表映射成硬邏輯的能力，及其良好的內(nèi)部架構(gòu)，可擴展配置的特點，在靈活度和使用效率上無出其右。本文設(shè)計了精巧的狀態(tài)機和各個數(shù)據(jù)處理模塊。將軟件程序的順序處理通過狀態(tài)機映射成物理電路實現(xiàn)，大大提高了處理速度。另外通過改變編解碼算法還可用于音視頻處理。具有很好的擴展性。具有研究和使用價值。
[Abstract]:Digital image processing technology is widely used in people's daily life and national security. The traditional digital image display system is based on ARM or DSP devices. These methods do not perform well in applications with large amount of image data and high demand for real-time display, power consumption and volume are large, and the operation is unstable, so the overall performance is not very good. The FPGA device used in this design has embedded microprocessor and DSP block, and a lot of configurable hard logic. Both floating-point processing, bandwidth, parallelism and real-time have significant advantages over the former. Therefore, the image processing system implemented by FPGA will have more advantages. The method used in this paper is sparten6 main chip, SD card memory chip and LCD display device. The SD card controller module including SPI protocol module, image decoding module, ping-pong operation FIFO module and FAT16 file structure display module are implemented in detail. Complete realization of digital image processing and display system based on SD card storage. The real-time dynamic display of high-definition image is realized by using HDL coding and calling IP core. Compared with software-based implementation, it has more advantages in processing speed, compatibility and expansibility. The implementation method based on FPGA makes full use of the rich hardware resources embedded in it and the ability of mapping RAM lookup table to hard logic, and its good internal architecture, extensible configuration, and no right in flexibility and efficiency. In this paper, a sophisticated state machine and various data processing modules are designed. The sequential processing of the software program is realized by mapping the state machine to the physical circuit, which greatly improves the processing speed. In addition, by changing the encoding and decoding algorithm can also be used for audio and video processing. It has good expansibility. Has the research and the use value.
【學(xué)位授予單位】：中南民族大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2013
【分類號】：TP368.12;TN791

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