發(fā)布時(shí)間：2018-05-01 17:32

  本文選題：CPU + Nios��； 參考：《北京工業(yè)大學(xué)》2012年碩士論文

【摘要】：以深亞微米工藝和IP核復(fù)用技術(shù)為基礎(chǔ)的片上系統(tǒng)（SoC）技術(shù)是超大規(guī)模集成電路發(fā)展的趨勢和當(dāng)今集成電路技術(shù)的主流。SoC以嵌入式系統(tǒng)為核心，集軟硬件于體，并在系統(tǒng)集成中追求產(chǎn)品系統(tǒng)的最大包容性，，能成功實(shí)現(xiàn)多學(xué)科的協(xié)作與融合。對于些僅為小批量應(yīng)用或處于開發(fā)階段的SoC，若馬上流片，則需要投入較多的資金，承擔(dān)較大的試制風(fēng)險(xiǎn)。而用FPGA來實(shí)現(xiàn)SoC的功能就可以降低或規(guī)避風(fēng)險(xiǎn)。 嵌入式CPU是嵌入式SoC的核心。嵌入式CPU種類繁多，選擇款好的處理器是開發(fā)SoC的重要步驟。性能是選擇嵌入式CPU的重要方面，性能測試則是開發(fā)嵌入式SoC的重要部分。目前在SoC設(shè)計(jì)中廣泛使用的32位RISC處理器，如ARM處理器和MIPS處理器均屬于商業(yè)內(nèi)核，使用者必須支付相對昂貴的授權(quán)費(fèi)。考慮到軟核的靈活性和可剪裁性，本文選擇四款免費(fèi)的嵌入式微處理器軟核進(jìn)行性能比較，它們分別是Nios II、MicroBlaze、LEON3和OpenRISC1200。性能測試采用被廣泛使用的Dhrystone2.1基準(zhǔn)測試程序。本文的重點(diǎn)和難點(diǎn)在于構(gòu)建硬件系統(tǒng)和修改軟件程序使其適應(yīng)不同的硬件平臺。在構(gòu)建硬件系統(tǒng)方面通過添加或去除某個(gè)模塊的實(shí)驗(yàn)來確定某個(gè)模塊在提升性能方面的作用。在修改軟件程序方面參考不同硬件平臺下的軟件庫函數(shù)對Dhrystone2.1進(jìn)行修改。 做了以下工作：1、使用Quartus II中的SOPC Builder構(gòu)建基于Nios II的硬件SOPC系統(tǒng)，使用Quartus II對系統(tǒng)進(jìn)行編譯并下載。在Nios II IDE下修改基準(zhǔn)測試程序。通過在不同的硬件配置和軟件設(shè)置下測得的性能數(shù)據(jù)，得到各個(gè)模塊和軟件選項(xiàng)在性能提高方面的作用。2、使用Xilinx嵌入式開發(fā)套件EDK(Embedded Development Kit)構(gòu)建基于MicroBlaze的硬件系統(tǒng)。在CPU配置上，與Nios II實(shí)驗(yàn)有所不同。CPU先后使用了兩種不同配置。在軟件開發(fā)方面，針對Xilinx的驅(qū)動程序來修改基準(zhǔn)測試程序，使得生成文件占有更小的空間且能更有效地運(yùn)行。3、在Linux環(huán)境下或Cygwin環(huán)境下使用GRLIB庫配置硬件，并使用Xilinx ISE對其進(jìn)行綜合、轉(zhuǎn)譯、映射和布局布線。在軟件方面，使用BCC進(jìn)行軟件的編譯工作。使用GRMON對硬件掃描，對軟件下載和運(yùn)行。4、使用Verilog HDL語言進(jìn)行基于OpenRISC1200的硬件系統(tǒng)構(gòu)建，使用Quartus II對搭建好的硬件系統(tǒng)進(jìn)行綜合。使用GCC、GDB、Binutils和uClibc等工具進(jìn)行or32交叉編譯工具鏈的構(gòu)建。使用構(gòu)建好的交叉編譯工具鏈對Dhrystone2.1程序進(jìn)行編譯和鏈接。使用Quartus II下載工具對軟硬件文件進(jìn)行下載和運(yùn)行。5、分別對各處理器系統(tǒng)配置和處理器結(jié)構(gòu)包括指令集架構(gòu)和緩存進(jìn)行比較，還從易實(shí)現(xiàn)性、易配置性、性能和面積上對各處理器進(jìn)行了比較。
[Abstract]:Based on deep submicron technology and IP core reuse technology, the system on chip (SoC) technology is the development trend of VLSI. Nowadays, the mainstream of integrated circuit technology. SoC is embedded system as the core, which integrates software and hardware. And in the system integration, the product system is the most inclusive, and the multidisciplinary collaboration and integration can be realized successfully. For the SoC which is only in small batch application or in the development stage, if the chip flows immediately, it needs to invest more funds and bear the larger risk of trial production. The use of FPGA to achieve the function of SoC can reduce or avoid risk. Embedded CPU is the core of embedded SoC. There are many kinds of embedded CPU, the choice of good processor is an important step to develop SoC. Performance is an important aspect of choosing embedded CPU, and performance testing is an important part of developing embedded SoC. At present, 32-bit RISC processors, such as ARM processors and MIPS processors, which are widely used in SoC design, are all commercial kernels, and users must pay relatively expensive authorization fees. Considering the flexibility and tailoring of soft core, this paper chooses four free embedded microprocessors to compare their performance. They are Nios II, MicroBlazeChe LEON3 and OpenRISC 1200. Performance testing uses the widely used Dhrystone2.1 benchmark program. The emphasis and difficulty of this paper is to build hardware system and modify software program to adapt to different hardware platforms. In the construction of hardware system, the function of a module in improving performance is determined by adding or removing a module. In the modification of software programs, reference to the software library functions under different hardware platforms to modify the Dhrystone2.1. Do the following work: 1, use SOPC Builder in Quartus II to build the hardware SOPC system based on Nios II, use Quartus II to compile and download the system. Modify the benchmark program under Nios II IDE. According to the performance data measured under different hardware and software settings, the function of each module and software option in improving performance is obtained. The hardware system based on MicroBlaze is constructed by using Xilinx embedded development suite EDK(Embedded Development Kit. CPU configuration is different from Nios II experiment. CPUs use two different configurations. In the aspect of software development, the benchmark program is modified for the driver of Xilinx, so that the generating file occupies less space and can run .3more efficiently. In Linux environment or Cygwin environment, the hardware is configured by using GRLIB library. And use Xilinx ISE to synthesize, translate, map and layout. In terms of software, BCC is used to compile the software. GRMON is used to scan hardware, software download and run. 4, Verilog HDL language is used to build the hardware system based on OpenRISC1200, and Quartus II is used to synthesize the built hardware system. The tool chain of or32 cross-compiling is constructed by using GCC-GDB-Binutils and uClibc. Use the built cross-compile tool chain to compile and link Dhrystone2.1 programs. Using the Quartus II download tool to download and run the software and hardware files. 5, compare the processor system configuration and processor architecture, including instruction set architecture and cache, from easy to implement, easy to configure, The performance and area of each processor are compared.
【學(xué)位授予單位】：北京工業(yè)大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2012
【分類號】：TP332

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本文編號：1830406