基于FPGA的SATA3.0硬盤陣列控制器設(shè)計
發(fā)布時間:2018-04-22 09:39
本文選題:SATA3.0 + 協(xié)議; 參考:《河北大學》2017年碩士論文
【摘要】:隨著航天技術(shù)的不斷發(fā)展,衛(wèi)星通信技術(shù)日益成熟,能夠?qū)崿F(xiàn)空對地的大容量、高速率的數(shù)據(jù)傳輸。雖然在現(xiàn)代通信中,高速數(shù)據(jù)的傳輸技術(shù)發(fā)展十分迅速,但是高速數(shù)據(jù)存儲技術(shù)的瓶頸依然很難突破。導致高速采集的數(shù)據(jù)不能及時有效存儲。在我國天地一體化網(wǎng)絡的背景下,越來越多的衛(wèi)星、空間站等復雜航天器要對地面高速傳輸大量數(shù)據(jù),要求地面在有限的時間內(nèi)將數(shù)據(jù)存儲以便于后期處理。尤其是在非同步衛(wèi)星過頂時間短的情況下,衛(wèi)星數(shù)據(jù)傳回速度可達10Gbps,而現(xiàn)在計算機存儲速度遠遠跟不上數(shù)據(jù)的傳輸速度。因此研究一種能夠?qū)⒑A繑?shù)據(jù)實時的高速存儲并便于攜帶的設(shè)備具有重要意義。國內(nèi)的硬盤存儲技術(shù)起步較晚,市面上較常見基于SATA2.0協(xié)議的硬盤控制器,2009年Serial ATA委員會提出了傳輸速度可達到600MB/s的第3代SATA協(xié)議標準后,SATA3.0接口的硬盤控制器一直處于研究發(fā)展的過程中。本文以SATA3.0接口硬盤作為存儲載體,以兩塊硬盤通過按位分配構(gòu)成RAID0陣列,以FPGA邏輯控制實現(xiàn)硬盤控制器直接進行硬盤數(shù)據(jù)讀寫,包括以邏輯控制實現(xiàn)協(xié)議應用層讀寫,從而能夠避開操作系統(tǒng)的介入,實現(xiàn)數(shù)據(jù)的高速讀寫。文中首先對SATA3.0協(xié)議的物理層、鏈路層、傳輸層、應用層進行了結(jié)構(gòu)和功能分析,介紹了RAID0陣列實現(xiàn)原理和方法并給出了硬盤陣列控制器的整體設(shè)計方案。其次,利用Verilog語言對SATA3.0硬盤控制器進行了詳細的設(shè)計以及功能仿真,最后通過數(shù)據(jù)分配單元實現(xiàn)RAID0硬盤陣列并對數(shù)據(jù)分配單元進行數(shù)據(jù)讀寫仿真。通過仿真測試,驗證了設(shè)計的正確性,實現(xiàn)了在150MHz時鐘下的單塊硬盤600MB/s,兩塊SATA3.0硬盤組成的RAID0陣列1.2GB/s的讀寫速度。
[Abstract]:With the development of space technology, satellite communication technology is becoming more and more mature, which can realize large capacity and high speed data transmission. Although high-speed data transmission technology is developing rapidly in modern communication, the bottleneck of high-speed data storage technology is still difficult to break through. As a result, the data collected at high speed can not be stored in time and effectively. Under the background of China's integrated network of space and earth, more and more complex spacecraft, such as satellites and space stations, have to transmit a large amount of data to the ground at high speed, which requires that the data be stored on the ground in a limited time to facilitate post-processing. Especially in the case of the short time of passing through the top of the non-synchronous satellite, the return speed of the satellite data can reach 10Gbps.However, the speed of the computer storage is far from keeping up with the transmission speed of the data. Therefore, it is of great significance to study a high-speed storage and portable device that can store large amounts of data in real time. The hard disk storage technology in China started relatively late. The hard disk controller based on SATA2.0 protocol is more common in the market. In 2009, the Serial ATA Committee proposed that the hard disk controller with SATA3.0 interface can meet the standard of the 3rd generation SATA protocol of 600MB/s, and the hard disk controller with SATA3.0 interface has been in the process of research and development. In this paper, SATA3.0 interface hard disk is used as storage carrier, two hard disks are allocated by bit to form RAID0 array, and FPGA logic control is used to realize hard disk data reading and writing directly, including realization of protocol application layer reading and writing by logic control. Thus, it can avoid the intervention of operating system and realize high speed reading and writing of data. In this paper, the structure and function of physical layer, link layer, transmission layer and application layer of SATA3.0 protocol are analyzed, the principle and method of RAID0 array implementation are introduced, and the overall design scheme of hard disk array controller is given. Secondly, the SATA3.0 hard disk controller is designed and simulated in detail by using Verilog language. Finally, the RAID0 hard disk array is realized by the data allocation unit and the data reading and writing simulation of the data allocation unit is carried out. Through the simulation test, the correctness of the design is verified, and the reading and writing speed of the RAID0 array 1.2GB/s composed of 600m / s single hard disk and two SATA3.0 hard disks under the 150MHz clock is realized.
【學位授予單位】:河北大學
【學位級別】:碩士
【學位授予年份】:2017
【分類號】:TP333.35
【參考文獻】
相關(guān)期刊論文 前10條
1 李振華;樓向雄;;固態(tài)硬盤RAID陣列技術(shù)進展[J];世界科技研究與發(fā)展;2017年01期
2 王麗娟;李錦明;杜東海;;基于FPGA的SFP光纖通信控制器的研究與設(shè)計[J];電子器件;2016年03期
3 張慶順;劉贊;郭寶增;張鎖良;;基于FPGA的SATA主機端控制器鏈路層發(fā)送模塊設(shè)計[J];河北大學學報(自然科學版);2016年02期
4 張s,
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