本文選題：閃存 + PCI-E�。� 參考：《國防科學(xué)技術(shù)大學(xué)》2013年碩士論文

【摘要】：近年來,閃存作為一種較為成熟的固態(tài)存儲介質(zhì),具有速度高、體積小、重量輕、功耗低等優(yōu)點,正逐步應(yīng)用到企業(yè)級服務(wù)器和高性能計算領(lǐng)域,為高性能計算中存儲系統(tǒng)性能的提高帶來新的機遇和挑戰(zhàn)。RAID(獨立磁盤冗余陣列)是一種廣泛應(yīng)用的數(shù)據(jù)存儲技術(shù),它通過數(shù)據(jù)分割、并行訪問提高性能,通過冗余糾錯提高可用性和可靠性�；陂W存構(gòu)建固態(tài)存儲陣列是構(gòu)建高性能、高可靠的大規(guī)模存儲系統(tǒng)的有效途徑之一,但將傳統(tǒng)RAID機制直接應(yīng)用于閃存存在小寫問題突出、Flash芯片磨損不均衡等問題。為此,本文基于現(xiàn)有的閃存及閃存陣列技術(shù),設(shè)計實現(xiàn)高性能、高可靠的固態(tài)存儲陣列。本文主要工作包括以下幾方面。(1)閃存技術(shù)與基于閃存的RAID機制研究。從閃存轉(zhuǎn)換層FTL(Flash Translation Layer)和緩存管理兩方面研究分析現(xiàn)有的閃存技術(shù)。分析總結(jié)基于閃存構(gòu)建RAID的關(guān)鍵技術(shù)。(2)設(shè)計了一種基于PCI-E接口的嵌入式固態(tài)存儲陣列卡。該陣列卡采用高速PCI-E接口與主機通信,同時設(shè)置16個通道并行管理64個閃存芯片,提供了比基于SAS或SATA接口的固態(tài)存儲設(shè)備更高的性能和可靠性。采用基準(zhǔn)測試程序?qū)虘B(tài)存儲陣列卡進(jìn)行了性能評測,實測最大I/O吞吐率達(dá)到524K(IOPS),最大I/O帶寬達(dá)到2.83GB/s。(3)提出了一種基于緩存的可重組RAID機制。以新型非易失存儲器SCM(Storage Class Mem ory)作為緩存,采用RAID重組思想,對緩存替換出的數(shù)據(jù)順序重組RAID條帶,克服了傳統(tǒng)RAID機制的小寫問題,提高了閃存陣列的性能和使用壽命,同時也解決了閃存陣列各芯片磨損不均衡的問題。模擬測試結(jié)果表明:可重組RAID機制有效減少了閃存陣列的讀寫響應(yīng)時間、擦除操作次數(shù),以及垃圾回收操作的頻率。
[Abstract]:In recent years, flash memory, as a mature solid state storage medium, has the advantages of high speed, small volume, light weight and low power consumption. For improving the performance of storage system in high performance computing, it brings new opportunities and challenges. Raid (redundant Array of Independent disks) is a widely used data storage technology, which improves performance through data segmentation and parallel access. Improve availability and reliability through redundancy correction. Building solid state memory array based on flash memory is one of the effective ways to build high performance and high reliability large scale memory system. However, there are some problems such as low case problem in applying traditional RAID mechanism to flash memory, such as uneven wear and tear of flash chip. Therefore, based on the existing flash memory and flash memory array technology, a high performance and high reliability solid state memory array is designed and implemented in this paper. The main work of this paper includes the following aspects: flash memory technology and RAID mechanism based on flash memory. The existing flash memory technology is analyzed from FTL(Flash Translation layer and cache management. This paper analyzes and summarizes the key technology of constructing RAID based on flash memory. It designs an embedded solid-state memory array card based on PCI-E interface. The array card uses high speed PCI-E interface to communicate with the host computer and 16 channels to manage 64 flash memory chips in parallel. It provides higher performance and reliability than solid state storage devices based on SAS or SATA interface. The performance of the solid-state memory array card is evaluated by using the benchmark program. The measured maximum I / O throughput is 524kg IOPS and the maximum I / O bandwidth is 2.83GB / s. 3) A buffer based reconfigurable RAID mechanism is proposed. A novel non-volatile memory (SCM(Storage Class Mem memory) is used as the cache. The RAID bands are reorganized in the order of the data replaced by the cache by using the RAID recombination idea, which overcomes the lowercase problem of the traditional RAID mechanism and improves the performance and service life of the flash memory array. At the same time, the problem of uneven wear of flash memory array chips is also solved. The simulation results show that the reconfigurable RAID mechanism can effectively reduce the read / write response time of flash memory array, the number of erasure operations, and the frequency of garbage collection.
【學(xué)位授予單位】：國防科學(xué)技術(shù)大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2013
【分類號】：TP333
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本文編號：1779989