本文選題：多核處理器 + 能量自適應(yīng)��； 參考：《電子科技大學(xué)》2013年碩士論文

【摘要】：近年來興起的能量獲取方式和能量輸送方式給集成電路帶來了新的機(jī)遇和挑戰(zhàn)。在構(gòu)建新型的電子系統(tǒng)能量消耗與供應(yīng)模型問題上，人們提出了能量自適應(yīng)的概念，并開始研究能量自適應(yīng)處理系統(tǒng)架構(gòu)及其功耗模型。通過例如基于片上網(wǎng)絡(luò)的研究使電子系統(tǒng)具備能量自適應(yīng)的能力，使之能適應(yīng)不同的能量供應(yīng)方式以及能量狀態(tài)，可以使電子系統(tǒng)具備更強(qiáng)的可靠性和適應(yīng)性。目前主流的嵌入式微處理器都為多核處理器且大部分都移動(dòng)化、便攜化，隨之而來的功耗問題成為目前移動(dòng)設(shè)備最需關(guān)注的問題之一。若為自適應(yīng)能量采集系統(tǒng)的能量輸入，在輸入能量支持最小系統(tǒng)工作的基礎(chǔ)上，如何通過實(shí)時(shí)檢測(cè)控制以實(shí)現(xiàn)系統(tǒng)的最大資源利用成為能量自適應(yīng)系統(tǒng)的主要關(guān)注點(diǎn)之一。 本文首先概述了能量自適應(yīng)技術(shù)的發(fā)展，能量自適應(yīng)片上系統(tǒng)和多核處理器的發(fā)展和現(xiàn)狀，以及研究能量自適應(yīng)下多核處理器技術(shù)的意義。然后介紹了流計(jì)算模型的基本原理，及面向流計(jì)算在多核處理器中的重要地位。流計(jì)算模型通過并行計(jì)算若干個(gè)數(shù)據(jù)通道，使得應(yīng)用的多個(gè)數(shù)據(jù)可以同時(shí)進(jìn)行交換。流應(yīng)用具有計(jì)算密集性、并行性和局域性等特征，使得流體系結(jié)構(gòu)能較好地解決現(xiàn)有高性能處理器體系結(jié)構(gòu)所面臨的難題。 論文重點(diǎn)研究了流處理器的流體系結(jié)構(gòu)。介紹了面向流計(jì)算的多核處理器的系統(tǒng)架構(gòu)和具體結(jié)構(gòu)，包括RISC-CPU處理器內(nèi)核，控制和計(jì)算子系統(tǒng)結(jié)構(gòu)、存儲(chǔ)層次結(jié)構(gòu)及對(duì)外接口。研究了能量自適應(yīng)下基于動(dòng)態(tài)可變能量的任務(wù)調(diào)度，通過任務(wù)調(diào)度控制信息完成對(duì)多核的任務(wù)重新分配及頻率調(diào)節(jié)。并在此基礎(chǔ)上，針對(duì)流計(jì)算的特性，通過基于FFT流數(shù)據(jù)計(jì)算的多核任務(wù)調(diào)度控制設(shè)計(jì)驗(yàn)證面向流計(jì)算的能量自適應(yīng)多核處理器的正確性。 文章設(shè)計(jì)了多核處理器在Altera公司提供的DE3FPGA平臺(tái)上的實(shí)現(xiàn)，并在相應(yīng)的驗(yàn)證環(huán)境及參數(shù)下進(jìn)行驗(yàn)證。完成在動(dòng)態(tài)能量下對(duì)多核處理器的任務(wù)和頻率的可調(diào)可控功能，通過在FPGA上實(shí)現(xiàn)分析所得結(jié)果提出改進(jìn)方案，以此實(shí)現(xiàn)有限能量下的多核系統(tǒng)最大性能。
[Abstract]:In recent years, energy acquisition and energy transmission have brought new opportunities and challenges to integrated circuits.In order to construct a new energy consumption and supply model for electronic systems, the concept of energy adaptation is put forward, and the architecture of energy adaptive processing system and its power consumption model are studied.For example, the research based on on-chip network can make the electronic system have the ability of energy adaptation, which can adapt to different energy supply modes and energy states, which can make the electronic system more reliable and adaptable.At present, the mainstream embedded microprocessors are multi-core processors and most of them are mobile and portable. The following power consumption problem has become one of the most important issues for mobile devices.For the energy input of adaptive energy acquisition system, on the basis of input energy supporting the minimum system work, how to realize the maximum resource utilization of the system through real-time detection control becomes one of the main concerns of the energy adaptive system.In this paper, the development of energy adaptive technology, the development and status of energy adaptive on-chip system and multi-core processor, and the significance of studying multi-core processor technology under energy adaptation are summarized in this paper.Then the basic principle of stream computing model and the importance of flow oriented computing in multi-core processors are introduced.The stream computing model computes several data channels in parallel, which enables multiple data to be exchanged at the same time.Stream applications are characterized by computational denseness, parallelism and locality, which enable the flow architecture to solve the problems faced by the existing high-performance processor architectures.This paper focuses on the stream architecture of stream processor.This paper introduces the architecture and structure of multi-core processor for stream computing, including RISC-CPU processor kernel, control and computing subsystem architecture, storage hierarchy and external interface.The task scheduling based on dynamic variable energy is studied in this paper. The multi-core task redistribution and frequency adjustment are accomplished by the task scheduling control information.On this basis, according to the characteristics of flow computation, the validity of the energy adaptive multi-core processor for flow computing is verified by the design of multi-core task scheduling control based on FFT stream data computing.This paper designs the implementation of multi-core processor on the DE3FPGA platform provided by Altera, and verifies it under the corresponding verification environment and parameters.The task and frequency of the multi-core processor can be adjusted and controlled under the dynamic energy. By implementing the analysis results on FPGA, an improved scheme is proposed to achieve the maximum performance of the multi-core system with limited energy.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP332

【參考文獻(xiàn)】

相關(guān)碩士學(xué)位論文 前3條

1 高金華;基于多核的任務(wù)調(diào)度研究與實(shí)現(xiàn)[D];中南大學(xué);2010年

2 肖大力;基于FPGA的SPARC多核結(jié)構(gòu)設(shè)計(jì)與實(shí)現(xiàn)及并行算法研究[D];哈爾濱工業(yè)大學(xué);2009年

3 尤凱迪;高性能低功耗多核處理器研究[D];復(fù)旦大學(xué);2011年

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本文編號(hào)：1748329