基于PCI互連的嵌入式多處理器系統(tǒng)通信機(jī)制研究
發(fā)布時(shí)間:2018-03-14 09:05
本文選題:嵌入式多處理器 切入點(diǎn):PCI總線 出處:《華中科技大學(xué)》2012年碩士論文 論文類型:學(xué)位論文
【摘要】:在安防、圖像處理、語(yǔ)音識(shí)別、網(wǎng)絡(luò)通信等計(jì)算密集型應(yīng)用領(lǐng)域,市面單顆嵌入式處理器的性能提升速度常常滿足不了人們的需求。應(yīng)用開發(fā)商往往會(huì)選擇一種稱為嵌入式多處理器方案。該方案以一定方式互連多顆嵌入式多處理器,借助芯片并行設(shè)計(jì)和軟件協(xié)同處理來(lái)達(dá)到性能倍增的效果。在所有的嵌入式處理器互連方式中,PCI總線以其高帶寬、通用性、成熟性以及低成本尤為引人矚目。本文主要研究對(duì)象為基于PCI互連的嵌入式多處理器系統(tǒng),,重點(diǎn)研究其中較為核心的片間通信機(jī)制。 本文首先介紹了嵌入式多處理器通信原理,通過對(duì)比雙口RAM、以太網(wǎng)總線、PCI總線以及Mesh架構(gòu)等互連方式的特點(diǎn)以及適用范圍,總結(jié)了PCI互連的優(yōu)勢(shì),在此基礎(chǔ)上歸納了PCI互連所要解決的主要問題。接著本文通過分析現(xiàn)有TCP/IPOver PCI方案的不足,設(shè)計(jì)了一種通用的面向嵌入式多處理器的并發(fā)通信模型。該模型以PCI內(nèi)存映射為基礎(chǔ),通過對(duì)通道劃分、報(bào)文格式、數(shù)據(jù)傳輸機(jī)制、管理機(jī)制等一系列核心問題討論,提出了一套完整的基于PCI的端到端通信方案。該方案可滿足跨越CPU節(jié)點(diǎn)的進(jìn)程間的高效、并發(fā)、對(duì)等通信需求。本文接下來(lái)基于Linux2.6.14內(nèi)核以及Hi3511雙處理器系統(tǒng),對(duì)模型進(jìn)行了詳細(xì)實(shí)現(xiàn)和完整測(cè)試。最后對(duì)整個(gè)測(cè)試結(jié)果進(jìn)行了具體分析,并對(duì)下一階段的研究工作進(jìn)行了展望。
[Abstract]:In computational intensive applications such as security, image processing, speech recognition, network communications, etc. The performance improvement speed of a single embedded processor in the market is often unable to meet the needs of people. Application developers often choose an embedded multi-processor solution, which interconnects multiple embedded multi-processors in a certain way. With the help of chip concurrent design and software collaborative processing, the performance can be doubled. In all embedded processor interconnection modes, PCI bus has high bandwidth and versatility. The maturity and low cost of embedded multi-processor systems based on PCI interconnection are the main research objects of this paper, with emphasis on the inter-chip communication mechanism. This paper first introduces the principle of embedded multi-processor communication, and summarizes the advantages of PCI interconnection by comparing the characteristics and application scope of dual-port Ram, Ethernet bus, PCI bus and Mesh architecture. On this basis, the main problems to be solved in PCI interconnection are summarized. Then, by analyzing the shortcomings of existing TCP/IPOver PCI schemes, a general concurrent communication model for embedded multi-processors is designed. The model is based on PCI memory mapping. A complete end-to-end communication scheme based on PCI is proposed by discussing a series of core issues, such as channel partition, message format, data transmission mechanism, management mechanism, etc. This scheme can meet the needs of efficient and concurrent interprocess across CPU nodes. Next, based on the Linux2.6.14 kernel and Hi3511 dual-processor system, the model is implemented and tested in detail. Finally, the whole test results are analyzed in detail, and the research work in the next stage is prospected.
【學(xué)位授予單位】:華中科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2012
【分類號(hào)】:TP368.1
【參考文獻(xiàn)】
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