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RRAM及其在FPGA設(shè)計(jì)中的應(yīng)用研究

發(fā)布時(shí)間:2018-03-03 13:29

  本文選題:RRAM 切入點(diǎn):FPGA 出處:《復(fù)旦大學(xué)》2013年碩士論文 論文類型:學(xué)位論文


【摘要】:由于現(xiàn)場(chǎng)可編程邏輯門陣列(FPGA)具有靈活可編程性、設(shè)計(jì)周期短、成本低等優(yōu)點(diǎn),廣泛應(yīng)用于消費(fèi)電子、通信設(shè)備以及航空電子等領(lǐng)域。但傳統(tǒng)的SRAM型FPGA掉電信息丟失,在增加板級(jí)硬件開銷的同時(shí)也帶來了系統(tǒng)可靠性與數(shù)據(jù)安全性問題。而反熔絲型和Flash型FPGA雖然具有非易失性,但其CMOS工藝兼容性差、編程電壓高。針對(duì)SRAM、反熔絲和Flash型FPGA器件的不足,本文研究了新型阻變存儲(chǔ)器RRAM在FPGA設(shè)計(jì)中的兩個(gè)關(guān)鍵問題:RRAM數(shù)學(xué)模型和RSRAM編程點(diǎn)電路設(shè)計(jì)。 RRAM的數(shù)學(xué)模型是RRAM應(yīng)用推廣的關(guān)鍵因素之一。本文采用分離變量法的思想,使用復(fù)數(shù)來構(gòu)造RRAM數(shù)學(xué)模型。首先,使用復(fù)數(shù)阻抗將四種基本元器件電阻、電容、電感和憶阻器memristor統(tǒng)一到廣義歐姆定律。然后分析了memristor復(fù)阻抗模型中的模值(即阻抗大小)與相位的物理來源,用線性遷移模型[3,4]來闡釋復(fù)阻抗大小的物理來源,用勢(shì)壘躍遷模型[3,4]來表征復(fù)阻抗相位的物理來源,并給出了仿真結(jié)果。 針對(duì)傳統(tǒng)SRAM型FPGA和Flash型FPGA所存在的不足,設(shè)計(jì)了兼具兩者優(yōu)點(diǎn)的FPGA編程點(diǎn)電路。采用2組2T1R(two transistors and one memristor)型RRAM編程配置電路與6管SRAM電路相結(jié)合,構(gòu)成10T2R(ten transistors and two memristors)型RSRAM編程點(diǎn)電路。10T2R型RSRAM結(jié)構(gòu)具有非易失性、CMOS工藝兼容性好、RRAM對(duì)SRAM電路干擾小、且支持高速在線編程和非易失離線編程兩種模式等特點(diǎn)。仿真表明:高速在線編程方式時(shí),讀寫延時(shí)不超過50ps;非易失離線編程方式時(shí),上電載入延時(shí)不超過200ps。 基于10T2R型RSRAM單元電路設(shè)計(jì)了RSRAM存儲(chǔ)陣列電路,采用經(jīng)典的存儲(chǔ)器架構(gòu),由32行32列10T2R型RSRAM單元電路、行列譯碼電路和讀寫驅(qū)動(dòng)電路構(gòu)成。仿真表明,該RSRAM存儲(chǔ)陣列電路能夠正常完成數(shù)據(jù)讀寫與上電數(shù)據(jù)載入,且延時(shí)不超過2ns。最后給出了版圖設(shè)計(jì)。
[Abstract]:Due to the advantages of flexible programmable logic gate array (FPGA), short design period and low cost, it is widely used in consumer electronics, communication equipment and avionics, but the traditional SRAM type FPGA power loss information is lost. At the same time, the system reliability and data security problems are brought about by increasing the hardware overhead of board level. Although anti-fuse type and Flash type FPGA are non-volatile, their CMOS process compatibility is poor. The programming voltage is high. In view of the shortcomings of SRAM, anti-fuse and Flash type FPGA devices, two key problems in FPGA design of new resistive memory RRAM are studied in this paper: the mathematical model of RRAM and the design of RSRAM programming point circuit. The mathematical model of RRAM is one of the key factors in the application and popularization of RRAM. In this paper, the mathematical model of RRAM is constructed by using the idea of separating variables and using the complex number. The inductor and resistor memristor are unified into the generalized Ohm law. Then, the physical source of the mode value (i.e. impedance magnitude) and phase in the memristor complex impedance model is analyzed, and the physical source of the complex impedance size is explained by the linear migration model [3 / 4]. The physical source of the complex impedance phase is characterized by the barrier transition model [3H4], and the simulation results are given. In view of the shortcomings of traditional SRAM FPGA and Flash FPGA, a FPGA programming point circuit with both advantages is designed. Two sets of RRAM programming configuration circuits of 2T1RX two transistors and one memory storr are combined with 6 transistor SRAM circuits. The 10T2R transistors and two memristorsType RSRAM programming point circuit .10T2R RSRAM structure has good compatibility with non-volatile CMOS process. RRAM has less interference to SRAM circuit. The simulation results show that the read / write delay is less than 50 pss in high speed online programming mode, and the load delay is not more than 200ps in non-volatile off-line programming mode. Based on 10T2R type RSRAM cell circuit, the RSRAM memory array circuit is designed, which is composed of 32 lines of 32-column 10T2R type RSRAM cell circuit, column decoding circuit and read-write drive circuit. The RSRAM memory array circuit can complete data reading and writing and power on data loading normally, and the delay is not more than 2ns. Finally, the layout design is given.
【學(xué)位授予單位】:復(fù)旦大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2013
【分類號(hào)】:TP333;TN791

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 段書凱;胡小方;王麗丹;李傳東;MAZUMDER Pinaki;;憶阻器阻變隨機(jī)存取存儲(chǔ)器及其在信息存儲(chǔ)中的應(yīng)用[J];中國(guó)科學(xué):信息科學(xué);2012年06期



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