本文選題：FPGA　切入點(diǎn)：配置存儲(chǔ)器　出處：《電子科技大學(xué)》2012年碩士論文　論文類型：學(xué)位論文

【摘要】：伴隨半導(dǎo)體工藝和數(shù)字集成電路本身不斷地更新?lián)Q代，F(xiàn)PGA（FieldProgrammable Gate Array，現(xiàn)場(chǎng)可編程門陣列）因其自身片上眾多的可編程資源和快速靈活的現(xiàn)場(chǎng)可編程特性，已在眾多領(lǐng)域得到廣泛應(yīng)用。而SRAM型FPGA其掉電則功能即丟失的特性，使得必須有一顆或多顆非易失存儲(chǔ)器與SRAM型FPGA配套使用，用以存儲(chǔ)FPGA的配置數(shù)據(jù)。隨著FPGA的規(guī)模不斷增加，其配置存儲(chǔ)器的容量也需越來(lái)越大，并且也需要具有非�？焖俚淖x取響應(yīng)時(shí)間；再加上為了更好的配合FPGA的上電、掉電、復(fù)位以及在系統(tǒng)調(diào)試和編程等特性，通用存儲(chǔ)器一般不是充當(dāng)FPGA配置存儲(chǔ)器的理想選擇，因此專門為FPGA定制的專用配置存儲(chǔ)器就有了與FPGA一樣的廣闊市場(chǎng)和發(fā)展前景。 本選題的研究目的是通過(guò)深入分析、研究國(guó)外先進(jìn)FPGA配置存儲(chǔ)器的設(shè)計(jì)技術(shù)，結(jié)合現(xiàn)有工藝的實(shí)際水平和此前相關(guān)項(xiàng)目的經(jīng)驗(yàn)基礎(chǔ)，嘗試形成FPGA配置存儲(chǔ)器的設(shè)計(jì)方法，并研制出可適應(yīng)市場(chǎng)上主流FPGA的配置方式的“16MbitFPGA配置存儲(chǔ)器”的產(chǎn)品。 由于受限于Flash Memory專利技術(shù)的壁壘，若要為本選題所研制的“16MbitFPGA配置存儲(chǔ)器”專門定制Flash Memory內(nèi)核則需要花費(fèi)非常昂貴的費(fèi)用和較長(zhǎng)的時(shí)間，因此本選題采用的技術(shù)路線是選用擁有Flash Memory專利技術(shù)授權(quán)的適合的工藝方提供的通用Flash Memory IP，以此為存儲(chǔ)內(nèi)核圍繞其進(jìn)行片上解壓縮電路、多版本配置文件選擇存儲(chǔ)電路和在系統(tǒng)編程電路等功能模塊的設(shè)計(jì)。“16Mbit FPGA配置存儲(chǔ)器”采用數(shù)字電路正向設(shè)計(jì)流程，進(jìn)行了功能設(shè)計(jì)、仿真、原型驗(yàn)證、綜合、布局布線和后仿真完整的設(shè)計(jì)步驟，最終實(shí)現(xiàn)了“16Mbit FPGA配置存儲(chǔ)器”的設(shè)計(jì)開發(fā)。 通過(guò)和與之配套的燒入軟件及FPGA聯(lián)調(diào)測(cè)試，目前已完成了對(duì)“16MbitFPGA配置存儲(chǔ)器”工程樣片的功能驗(yàn)證，測(cè)試結(jié)果符合設(shè)計(jì)要求，能夠適應(yīng)目前市場(chǎng)上主流FPGA的多種配置應(yīng)用模式，，實(shí)現(xiàn)了預(yù)期的目標(biāo)；所掌握的設(shè)計(jì)技術(shù)可以被利用于今后相類似的項(xiàng)目設(shè)計(jì)和產(chǎn)品研發(fā)中，為同類產(chǎn)品的研發(fā)積累了一定的經(jīng)驗(yàn)。
[Abstract]:With semiconductor technology and digital integrated circuit itself constantly upgrading, FPGA (FieldProgrammable Gate Array, field programmable gate array) because of its large on-chip programmable resources and fast and flexible field programmable characteristics, has been widely used in many fields. But SRAM FPGA the power down function is lost the characteristics, there must be one or a plurality of non-volatile memory and supporting the use of SRAM FPGA to FPGA configuration data storage. With the scale of FPGA is increasing, the allocation of memory capacity also needs more and more, and also needs to have a very fast read response time; add to power with FPGA, the better off power and reset in the system debugging and programming features, general memory is generally not act as the ideal choice of the FPGA configuration memory, therefore specially tailored for FPGA special configuration storage The reservoir has the same broad market and prospects as FPGA.
The purpose of this research is through in-depth analysis, research on design technology of foreign advanced FPGA configuration memory, combined with the actual level of experience of the existing technology and previous projects, design methods try to form FPGA configuration memory, and can be developed to adapt to the market mainstream FPGA configuration "16MbitFPGA configuration memory" products.
Due to the limited Flash Memory patented technology barriers to this topic developed "16MbitFPGA configuration memory" customized Flash Memory kernel requires very expensive cost and long time, so the technical route of this topic is choosing the general Flash Memory IP has the suitable technology authorized Flash Memory patented technology provide, to store the kernel around its on-chip decompression circuit, multi version configuration file selection and storage circuit in the design of the system programming circuit module. The 16Mbit FPGA configuration memory "by digital circuit top-down design process, the function design, simulation, verification, synthesis, simulation, layout design steps and after complete, finally realized" the design and development of 16Mbit FPGA configuration memory ".
By and with the support of the burning software and FPGA test, has completed the "16MbitFPGA configuration memory" sample verification, the test results meet the design requirements, can adapt to the current market mainstream FPGA configuration application mode, to achieve the desired objectives; the design techniques can be used in the future similar project design and product development, accumulated some experience for the development of similar products.

【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2012
【分類號(hào)】：TP333;TN791

【參考文獻(xiàn)】

相關(guān)期刊論文 前4條

1 王飛 ,徐欣 ,于紅旗;應(yīng)用IRL技術(shù)實(shí)現(xiàn)系統(tǒng)的遠(yuǎn)程升級(jí)[J];電子產(chǎn)品世界;2002年17期

2 龐業(yè)勇;王少軍;彭喜元;;基于SOPC的遠(yuǎn)程可重構(gòu)系統(tǒng)設(shè)計(jì)方法研究[J];電子測(cè)量與儀器學(xué)報(bào);2010年06期

3 周維;何健鷹;聶菊根;;CPLD和FPGA編程與配置的實(shí)現(xiàn)[J];計(jì)算機(jī)與數(shù)字工程;2006年01期

4 劉麗娜;;嵌入式系統(tǒng)綜述[J];科技創(chuàng)新導(dǎo)報(bào);2009年11期

相關(guān)重要報(bào)紙文章 前1條

1 安勇龍;[N];中國(guó)電子報(bào);2007年

相關(guān)碩士學(xué)位論文 前4條

1 郭磊;矩陣運(yùn)算的硬件加速技術(shù)研究[D];國(guó)防科學(xué)技術(shù)大學(xué);2010年

2 李寧;基于Xilinx FPGA的機(jī)電系統(tǒng)智能控制器設(shè)計(jì)及應(yīng)用[D];山東大學(xué);2010年

3 蘇軒;閃存存儲(chǔ)設(shè)備仿真平臺(tái)與應(yīng)用研究[D];中國(guó)科學(xué)技術(shù)大學(xué);2010年

4 李蔚;基于閃存數(shù)據(jù)庫(kù)系統(tǒng)的存儲(chǔ)管理技術(shù)研究[D];華中科技大學(xué);2009年

本文編號(hào)：1560649